This paper presents a dual-antenna energy harvesting (EH) system using full-energy extraction (FEE) to reduce the buffer capacitor requirement and improve the input power response speed. Instead of using large buffer capacitors (in the order of mu F) at the rectifier output, the proposed FEE technique can efficiently harvest the incoming 915MHz radio-frequency (RF) energy using only a 1-nF capacitor per channel, while reducing the operating frequency of the subsequent DC-DC converter for power loss minimization. The two most popular RF rectifiers are investigated to relax the energy extraction degradation due to impedance mismatch. The boost DC-DC converter combines the harvested energy from the dual-inputs through the FEE controller. Fabricated in standard 0.18-mu m CMOS and wire-bonded on an FR4 PCB, the dual-antenna EH system with the DC-DC converter operating typically at 6.25kHz demonstrates a measured peak system efficiency of 75.2% at an output power of 22.6 mu W using only two 1-nF buffer capacitors at 1-mu F load. With a significant buffer size reduction than prior art at similar efficiency/power level, a short startup time of similar to 45ms is achieved when the output rises from 0 to 1 V at 15.5 mu W total rectifier output power, corresponding to 90% startup time reduction over the conventional approach.