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Modeling Attack Resistant Strong PUF Exploiting Obfuscated Interconnections with <0.83% Bit-Error Rate
Xu, Chongyao1; Zhang, Jieyun1; Law, Man-Kay1; Jiang, Yang1; Zhao, Xiaojin2; Mak, Pui-ln1; Martins, Rui P.1,2
2021-12
Conference Name2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)
Source PublicationProceedings - A-SSCC 2021: IEEE Asian Solid-State Circuits Conference
Conference Date07-10 November 2021
Conference PlaceBusan
CountryKorea, Republic of
Publication PlaceIEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA
PublisherIEEE
Abstract

Silicon-based physical unclonable functions (PUFs), which exploit the natural random entropy during the chip manufacturing process, can generate random, unique and stable responses upon an input challenge. Instead of using complex crypto-algorithms, strong PUFs having a huge number of challenge-response pairs (CRPs) can be directly employed for low-cost authentication in many emerging IoT applications [1] –[4]. Yet, they typically are vulnerable towards machine learning (ML) attacks and exhibit a high bit-error rate (BER) [1], [5]. Even though the popular PUF obfuscation approach (e.g. hash processing and linear feedback shift register) can significantly enhance the ML attack resistance, they typically require extra processing steps involving PUF responses, which can inevitably degrade the achievable BER. This work reports an obfuscated interconnection physical unclonable function (OIPUF) containing two identical Ol blocks with intertwined stagewise intermediary networks. When compared with the conventional obfuscation approach, we explore the exponential stagewise interconnection to achieve intrinsic obfuscation without requiring extra hardware resources nor sacrificing the PUF reliability. We further propose a metastability-detection arbiter (MD-arbiter) array to improve the PUF reliability, demonstrating a measured worst case BER of 0.83% and an 1162x separation between inter and intra hamming distance (HD) while attaining a ML attack prediction accuracy of ∼ 50.59% with up to 10M training CRPs.

DOI10.1109/A-SSCC53895.2021.9634729
URLView the original
Indexed ByCPCI-S
Language英語English
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000768220800019
Scopus ID2-s2.0-85123980583
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Cited Times [WOS]:4   [WOS Record]     [Related Records in WOS]
Document TypeConference paper
CollectionINSTITUTE OF MICROELECTRONICS
Faculty of Science and Technology
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Corresponding AuthorLaw, Man-Kay
Affiliation1.University of Macau, Macau, China
2.Shenzhen University, Shenzhen, China
3.Instituto Superior Técnico, Universidade de Lisboa, Portugal
First Author AffilicationUniversity of Macau
Corresponding Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Xu, Chongyao,Zhang, Jieyun,Law, Man-Kay,et al. Modeling Attack Resistant Strong PUF Exploiting Obfuscated Interconnections with <0.83% Bit-Error Rate[C], IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE, 2021.
APA Xu, Chongyao., Zhang, Jieyun., Law, Man-Kay., Jiang, Yang., Zhao, Xiaojin., Mak, Pui-ln., & Martins, Rui P. (2021). Modeling Attack Resistant Strong PUF Exploiting Obfuscated Interconnections with <0.83% Bit-Error Rate. Proceedings - A-SSCC 2021: IEEE Asian Solid-State Circuits Conference.
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