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A 90nm CMOS Bio-Potential Signal Readout Front-End with Improved Powerline Interference Rejection
Chon-Teng Ma2; Pui-In Mak2; Mang-I Vai2; Peng-Un Mak2; Sio-Hang Pun2; Wan Feng2; R. P. Martins1,2
2009-10-26
Conference NameIEEE International Symposium on Circuits and Systems (ISCAS 2009)
Source PublicationProceedings - IEEE International Symposium on Circuits and Systems
Pages665-668
Conference DateMAY 24-27, 2009
Conference PlaceTaipei, TAIWAN
Abstract

This paper describes a 90nm CMOS low-noise low-power biopotential signal readout front-end (RFE). The front-stage instrumentation amplifier (IA) features a chopper; an AC-coupler and a novel chopper notch filter for minimizing the dc-offset; transistors' flicker noise and 50Hz powerline interference concurrently. A noise-aware transistor selection (thin- and thick-oxide) in the IA enables a flexible tradeoff between noise and input impedance performances. The 2 stage is a spike filter clocked by a parallel use of two non-overlapping clock generators, effectively tracking and suppressing the chopper spikes. The last stage is a gain-bandwidth-controllable amplifier for boosting the gain and alleviating different bio-potential signal measurements through simple digital controls. Simulation results showed that the RFE is capable of tolerating a differential electrode offset up to ±50mV, while achieving 140dB CMRR and 51.4nV/√Hz input-referred noise density. The notch at 50Hz achieves 41dB rejection. The entire RFE consumes 16.55 to 35.5μA at 3V. 

DOI10.1109/ISCAS.2009.5117836
URLView the original
Indexed ByCPCI-S
Language英語English
WOS Research AreaComputer Science ; Engineering
WOS SubjectComputer Science, Information Systems ; Engineering, Electrical & Electronic
WOS IDWOS:000275929800167
Scopus ID2-s2.0-70350139577
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Document TypeConference paper
CollectionFaculty of Science and Technology
INSTITUTE OF MICROELECTRONICS
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Affiliation1.Instituto Superior Técnico (IST)/ TU of Lisbon, Portugal
2.Department of Electrical and Electronics Engineering, FST, University of Macau, Macao, China
First Author AffilicationFaculty of Science and Technology
Recommended Citation
GB/T 7714
Chon-Teng Ma,Pui-In Mak,Mang-I Vai,et al. A 90nm CMOS Bio-Potential Signal Readout Front-End with Improved Powerline Interference Rejection[C], 2009, 665-668.
APA Chon-Teng Ma., Pui-In Mak., Mang-I Vai., Peng-Un Mak., Sio-Hang Pun., Wan Feng., & R. P. Martins (2009). A 90nm CMOS Bio-Potential Signal Readout Front-End with Improved Powerline Interference Rejection. Proceedings - IEEE International Symposium on Circuits and Systems, 665-668.
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