A power-efficient capacitor structure for high-speed charge recycling SAR ADCs

doi:10.1109/ICECS.2008.4674935

UM > Faculty of Science and Technology > DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING

Residential College	false
Status	已發表Published
	A power-efficient capacitor structure for high-speed charge recycling SAR ADCs
	Zhu Y.2 ; Chio U.-F.2 ; Wei H.-G.2 ; Sin S.-W.2 ; Upa S.-P.2 ; Martins R.P.2
	2008-12-26
Conference Name	2008 15th IEEE International Conference on Electronics, Circuits and Systems
Source Publication	Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008
Pages	642-645
Conference Date	31 Aug.-3 Sept. 2008
Conference Place	St. Julien's, Malta
Abstract	A novel Capacitor array structure for Successive Approximation Register (SAR) ADC is proposed. This circuit efficiently utilizes charge recycling to achieve high-speed of operation and it can be applied to low-to-medium- resolution, high-speed SAR ADC's. The parasitic effects of the proposed structure are analyzed theoretically and behavioral simulations are presented to verify the circuit's performance under those non-idealities. The simulation results show that the proposed capacitor array structure can reduce the average power consumed in the capacitor array by 90% when compared to the binary-weighted splitting capacitor method. © 2008 IEEE.
DOI	10.1109/ICECS.2008.4674935
URL	View the original
Language	英語English
Scopus ID	2-s2.0-57849085876
Fulltext Access	View Full-Text via DOI View Full-Text via Scopus
Citation statistics
Document Type	Conference paper
Collection	DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING Faculty of Science and Technology INSTITUTE OF MICROELECTRONICS
Affiliation	1.Instituto Superior Técnico 2.Universidade de Macau
First Author Affilication	University of Macau
Recommended Citation GB/T 7714	Zhu Y.,Chio U.-F.,Wei H.-G.,et al. A power-efficient capacitor structure for high-speed charge recycling SAR ADCs[C], 2008, 642-645.
APA	Zhu Y.., Chio U.-F.., Wei H.-G.., Sin S.-W.., Upa S.-P.., & Martins R.P. (2008). A power-efficient capacitor structure for high-speed charge recycling SAR ADCs. Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, 642-645.

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