This paper presents a 112-Gb/s single-ended (SE) PAM-4 transceiver front-end for the reach-extension module in a 130 nm SiGe BiCMOS technology. The transmitter front-end is based on a differential-To-SE driver where the negative capacitance scheme is introduced to extend its bandwidth. The receiver front-end features a low-mismatch SE-To-differential (S2D) amplifier and an inductor-reuse continuous-Time linear equalizer (CTLE). In the S2D, both the asymmetric reused inductor and capacitance compensation techniques are implemented to eliminate the mismatch at the pseudo-differential outputs. In the CTLE, both the inductor reuse and boosted current reuse techniques are adopted to save area, and further boost the maximum peaking frequency and equalization range. Our SE link demonstrates the highest 112-Gb/s PAM-4 data rate at a 20-dB channel loss with an energy efficiency of 1.81 pJ/bit.