Residential College | false |
Status | 已發表Published |
An Energy-Efficient SIFT Based Feature Extraction Accelerator for High Frame-Rate Video Applications | |
Liu, Bingqiang1; Yin, Zehua1; Zhang, Xvpeng1; Zhan, Yi2; Hu, Xiaofeng3; Yu, Guoyi1; Zheng, Yuanjin4; Wang, Chao5; Zou, Xuecheng5 | |
2022-08-25 | |
Source Publication | IEEE Transactions on Circuits and Systems I: Regular Papers |
ISSN | 1549-8328 |
Volume | 69Issue:12Pages:4930-4943 |
Abstract | Visual feature extraction is a key technology of computer vision for intelligent video processing. Efficient feature extraction is a fundamental problem in computer vision applications. Scale-Invariant Feature Transform (SIFT) is one of the most popular feature extraction algorithms because SIFT features are invariant to image scale and rotation and robust to changes in illumination and noise. However, SIFT is a computationally-intensive and power-hungry algorithm, which needs to be accelerated by efficient hardware design to achieve both high-speed feature extraction and high energy efficiency for many high frame-rate video applications at Artificial-intelligent Internet of Things edges. In this work, an energy-efficient SIFT based feature extraction accelerator is proposed. In the Gaussian pyramid and Differences of Gaussian (DoG) pyramid construction process, three design methods are proposed to reduce power consumption and improve information fidelity: a fast and slow dual clock domain design method with a reconfigurable design strategy is proposed to reduce the computation resources; a partial sum reuse design method is proposed to further reduce the computation resources and the amount of computation; a dynamic padding design method is proposed to solve the problem of information loss at image edges and corners after convolution operation. In the keypoint descriptor generation process, an optimized algorithm using circular region and polar coordinates is proposed to parallelize the main orientation assignment and descriptor generation to achieve high-speed processing, while maintaining a comparable matching accuracy with the state-of-the-art designs. The experiment results show that the proposed SIFT hardware accelerator is able to extract features by up to 162 frames per second ( 640 × 480 pixels) under 100 MHz, with the power consumption of 364.26 mW and energy efficiency of 2.25 mJ/frame based on 180 nm technology, which is suitable for many high frame-rate AIoT applications including autonomous driving cars and unmanned aerial vehicles. |
Keyword | Feature Extraction Scale-invariant Feature Transform (Sift) High Frame Rate Hardware Accelerator |
DOI | 10.1109/TCSI.2022.3199475 |
URL | View the original |
Indexed By | SCIE |
Language | 英語English |
WOS Research Area | Engineering |
WOS Subject | Engineering, Electrical & Electronic |
WOS ID | WOS:000846430800001 |
Publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 445 HOES LANE, PISCATAWAY, NJ 08855-4141 |
Scopus ID | 2-s2.0-85137563810 |
Fulltext Access | |
Citation statistics | |
Document Type | Journal article |
Collection | THE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU) Faculty of Science and Technology INSTITUTE OF MICROELECTRONICS DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING |
Corresponding Author | Wang, Chao |
Affiliation | 1.School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074, China 2.State-Key Laboratory of Analog and Mixed-Signal VLSI/IME and FST-ECE, University of Macau, Macau, China 3.School of Electrical and Computer Engineering, University of Michigan, Ann Arbor, MI 48109 USA 4.School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798 5.Wuhan National Laboratory of Optoelectronics and the School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074, China |
Recommended Citation GB/T 7714 | Liu, Bingqiang,Yin, Zehua,Zhang, Xvpeng,et al. An Energy-Efficient SIFT Based Feature Extraction Accelerator for High Frame-Rate Video Applications[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2022, 69(12), 4930-4943. |
APA | Liu, Bingqiang., Yin, Zehua., Zhang, Xvpeng., Zhan, Yi., Hu, Xiaofeng., Yu, Guoyi., Zheng, Yuanjin., Wang, Chao., & Zou, Xuecheng (2022). An Energy-Efficient SIFT Based Feature Extraction Accelerator for High Frame-Rate Video Applications. IEEE Transactions on Circuits and Systems I: Regular Papers, 69(12), 4930-4943. |
MLA | Liu, Bingqiang,et al."An Energy-Efficient SIFT Based Feature Extraction Accelerator for High Frame-Rate Video Applications".IEEE Transactions on Circuits and Systems I: Regular Papers 69.12(2022):4930-4943. |
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