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8.2 A 22.4-to-26.8GHz Dual-Path-Synchronized Quad-Core Oscillator Achieving -138dBc/Hz PN and 193.3dBc/Hz FoM at 10MHz Offset from 25.8GHz | |
Xiangxun Zhan1; Jun Yin1; Pui-In Mak1; Rui P. Martins1,2 | |
2023-03-23 | |
Conference Name | IEEE International Solid-State Circuits Conference |
Source Publication | Digest of Technical Papers - IEEE International Solid-State Circuits Conference |
Volume | 2023-February |
Pages | 148-150 |
Conference Date | 19-23 February 2023 |
Conference Place | San Francisco, CA, USA |
Country | United States |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Abstract | The denser modulation scheme, employed by high-speed wireless communications, such as 5G, demands millimeter-wave (mm-wave) oscillators with low phase noise (PN). Generally, the PN of an LC oscillator can be reduced by downscaling its tank inductance. Yet, an over-shrunk single-turn spiral inductor suffers from Q degradation [1], impairing the figure-of-merit (FoM) and the minimum-achievable PN of the oscillator. Coupling multiple oscillators together is effective for PN reduction. Ideally, an N-core coupled oscillator can achieve 10log(N) lower PN when compared with a single-core oscillator. Nevertheless, the frequency mismatch between the oscillator cores tends to penalize the PN improvement and FoM of a coupled oscillator (Fig. 8.2.1 upper). Figure 8.2.1 (bottom) depicts two approaches to implement a quad-core oscillator by connecting four cores using: 1) spiral inductors (transformers) in a concentric way [2], [3], or 2) slab inductors (transformers) in a circular way [1], [4]. Since the outputs of either of the two cores in the first approach can be directly connected via a short metal trace with a small resistance, it benefits from a small PN penalty induced by the frequency mismatch. But the poor Q of the small spiral inductor limits its PN. On the contrary, the latter approach features a circular inductor (transformer) with an improved Q but suffers from a large PN penalty due to the frequency mismatch between two non-adjacent cores, i.e., cores #1 (#2) and #3(#4), since the non-adjacent cores are not directly connected and synchronized. |
DOI | 10.1109/ISSCC42615.2023.10067277 |
URL | View the original |
Language | 英語English |
Scopus ID | 2-s2.0-85151660351 |
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Citation statistics | |
Document Type | Conference paper |
Collection | INSTITUTE OF MICROELECTRONICS Faculty of Science and Technology |
Corresponding Author | Jun Yin |
Affiliation | 1.University of Macau,Macao 2.Instituto Superior Tecnico/University of Lisboa,Lisboa,Portugal |
First Author Affilication | University of Macau |
Corresponding Author Affilication | University of Macau |
Recommended Citation GB/T 7714 | Xiangxun Zhan,Jun Yin,Pui-In Mak,et al. 8.2 A 22.4-to-26.8GHz Dual-Path-Synchronized Quad-Core Oscillator Achieving -138dBc/Hz PN and 193.3dBc/Hz FoM at 10MHz Offset from 25.8GHz[C]:Institute of Electrical and Electronics Engineers Inc., 2023, 148-150. |
APA | Xiangxun Zhan., Jun Yin., Pui-In Mak., & Rui P. Martins (2023). 8.2 A 22.4-to-26.8GHz Dual-Path-Synchronized Quad-Core Oscillator Achieving -138dBc/Hz PN and 193.3dBc/Hz FoM at 10MHz Offset from 25.8GHz. Digest of Technical Papers - IEEE International Solid-State Circuits Conference, 2023-February, 148-150. |
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