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Status | 已發表Published |
10.7 A Single-Channel 70dB-SNDR 100MHz-BW 4th-Order Noise-Shaping Pipeline SAR ADC with Residue Amplifier Error Shaping | |
Yanbo Zhang1,2; Junyan Hao1,2; Shubin Liu2; Zhangming Zhu2; Yan Zhu1; Chi Hang Chan1; R. P. Martins1,3 | |
2023-03-23 | |
Conference Name | 2023 IEEE International Solid-State Circuits Conference (ISSCC) |
Source Publication | Digest of Technical Papers - IEEE International Solid-State Circuits Conference |
Volume | 2023-February |
Pages | 178-180 |
Conference Date | 19-23 February 2023 |
Conference Place | San Francisco, CA, USA |
Country | United States |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Abstract | Emerging wireless standards demand ADCs with hundred megahertz (MHz) bandwidth (BW) with an inband dynamic range (DR) better than 60textdB. Continuous-time sigma-delta modulators can accommodate a high DR under low OSR for a wideband target [1]. Nevertheless, power-hungry integrators limit the energy efficiency of CTSDMs with a best reported sim 166textdB Schreier textFoM(textFoMs), while suffering from the STF peaking issue. Noise-shaping SAR (NS-SAR) ADCs are free from the aforementioned constraints, and well-suited to multi-standard wireless communication systems with an energy-efficient, fully passive integrator and an easily configurable architecture. Furthermore by timeInterleaving the NS-SAR (TINS-SAR), the BW boosts to 80textMHz with sim 66textdB SNDR, maintaining an outstanding efficiency of 171.2 textFoMs [2]. However, the NS order and efficiency are difficult to enhance due to the lack of active summation nodes, limiting the achievable SNR and DR. Moreover, the necessitated coarse-fine quantization and midway feedback scheme [3] textprevent a high interleaving factor in the TINS -SAR ADC, thus holding back the BW from a further push. Rather than TI, hybridizing the pipeline with NS-SAR (NS-PiSAR) also can extend the BW while simultaneously enabling a high NSefficiency [4]. Previous arts demonstrate a 1 textst -order NS-PiSAR ADC with a40textMHz BW and sim 75textdB SNDR, but requiring a background-calibrated residue amplifier (RA). When pursuing hundred MHz BW, the impairments from the RA are a bottleneck. This work presents a single-channel NS-PiSAR ADC with effective 4 textth -order NS, achieving a peak SNDR of 70. 15textdB over 100textMHz BW. With a one-time-only trimming, the ADC is robust under VT variations. |
DOI | 10.1109/ISSCC42615.2023.10067689 |
URL | View the original |
Language | 英語English |
Scopus ID | 2-s2.0-85151652880 |
Fulltext Access | |
Citation statistics | |
Document Type | Conference paper |
Collection | INSTITUTE OF MICROELECTRONICS DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING |
Affiliation | 1.University of Macau,Macao 2.Xidian University,Xi'an,China 3.Lnstituto Superior Tecnico/University of Lisboa,Lisbon,Portugal |
First Author Affilication | University of Macau |
Recommended Citation GB/T 7714 | Yanbo Zhang,Junyan Hao,Shubin Liu,et al. 10.7 A Single-Channel 70dB-SNDR 100MHz-BW 4th-Order Noise-Shaping Pipeline SAR ADC with Residue Amplifier Error Shaping[C]:Institute of Electrical and Electronics Engineers Inc., 2023, 178-180. |
APA | Yanbo Zhang., Junyan Hao., Shubin Liu., Zhangming Zhu., Yan Zhu., Chi Hang Chan., & R. P. Martins (2023). 10.7 A Single-Channel 70dB-SNDR 100MHz-BW 4th-Order Noise-Shaping Pipeline SAR ADC with Residue Amplifier Error Shaping. Digest of Technical Papers - IEEE International Solid-State Circuits Conference, 2023-February, 178-180. |
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