This paper presents a fully-integrated flexible dualring switched-capacitor (SC) converter to address the limited output voltage resolution in conventional SC converters. Based on the concept of reconfiguring multiple SC cells in series, the proposed dual-ring SC (DRSC) converter offers various combinations of cascading stages through the outer main ring configuration. Furthermore, the inner sub-ring operation allows for a more flexible selection of output nodes, enabling different power path interconnections and increasing the number of available voltage conversion ratios (VCRs). With 9 fractional VCRs, the converter offers a wide output range and fine output resolution. Compared to traditional SC topologies, the proposed topology exhibits the lowest slow switching limit resistance (R_SSL) and the most favorable G-V² metric, indicating high power efficiency. In addition, to reduce the parasitic capacitance, triplewell junction capacitors with increased reverse bias voltage were proposed. Parasitic capacitance with as low to 0.4% of the main capacitance was achieved. 3.9% efficiency improvement was measured. The chip was fabricated in a 180nm CMOS process and measured with 83% peak efficiency and 200mA maximum load current.