| Residential College | false |
| Status | 已發表Published |
| A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM | |
TAN FEI ; YU WEI HAN ; LIN JINHAI; UN KA FAI ; RUI P. MARTINS; MAK PUI IN
| |
| 2024-02 | |
| Conference Name | IEEE International Solid-State Circuits Conference (ISSCC) |
| Conference Date | 2024-02-18 to 2024-02-22 |
| Conference Place | San Francisco, CA, USA |
| Indexed By | SCIE |
| Document Type | Conference paper |
| Collection | INSTITUTE OF MICROELECTRONICS |
| Corresponding Author | YU WEI HAN |
| Affiliation | University of Macau |
| First Author Affilication | University of Macau |
| Corresponding Author Affilication | University of Macau |
| Recommended Citation GB/T 7714 | TAN FEI,YU WEI HAN,LIN JINHAI,et al. A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM[C], 2024. |
| APA | TAN FEI., YU WEI HAN., LIN JINHAI., UN KA FAI., RUI P. MARTINS., & MAK PUI IN (2024). A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM. . |
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