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An 80W Single-Inductor DC-DC Architecture for Simultaneous Flash Charging and Dual-Output PoL Supply with 92.1% Peak Efficiency from 15V-to-28V Input to 12.6V/3.3V/1V Outputs Using 1.3mm3Inductor
Zhang, Xiongjie1; Zhao, Anyang1; Li, Xinman1; Jiang, Yang1; Martins, Rui P.1,2; Mak, Pui In1
2024-10
Conference Name50th IEEE European Solid-State Electronics Research Conference, ESSERC 2024
Source PublicationEuropean Solid-State Circuits Conference, Proceeding of 2024 IEEE European Solid-State Electronics Research Conference (ESSERC)
Pages61-64
Conference Date9-12 September 2024
Conference PlaceBruges
CountryBelgium
PublisherIEEE Computer Society
Abstract

This paper presents a high-density DC-DC power delivery (PD) scheme using the proposed synergetic PD architecture (SyPoDA), enabling simultaneous 3-cell Li-ion battery charging under USB PD 3.2 protocol and single-inductor dual-output (SIDO) point-of-load (PoL) supplies. The proposed SyPoDA synergizes a switched-capacitor (SC) flash charger with our proposed hybrid SIDO converter, featuring 1) power stage sharing along charging and load-supply paths, 2) constant inductor DC current (IL,DC) reduction at the PoL side, and 3) uninterrupted steady-state SIDO output current. It can improve the utilization of the high-voltage part power stage, reduce the inductor size, and lower the output capacitor (Co) requirement, improving the total power density. In circuit design, we propose a pulse-current-based gate driver (PCGD) circuit for monolithic GD integration. Fabricated in a 180-nm BCD process, the proposed SyPoDA prototype within a total 3D volume of 117mm3 achieves a 92.1% peak efficiency at 42 W total output when converting a 15-to-28-V input to three outputs of 12.6V/3.3V/1V. It supports a maximum output power of 80W.

KeywordDc-dc Flash-charger Integrated Gate Driver Power Delivery Single-inductor Multiple-output
DOI10.1109/ESSERC62670.2024.10719468
URLView the original
Language英語English
Scopus ID2-s2.0-85208435182
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Document TypeConference paper
CollectionFaculty of Science and Technology
THE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU)
INSTITUTE OF MICROELECTRONICS
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Corresponding AuthorZhang, Xiongjie
Affiliation1.IME University of Macau, State Key Laboratory of Analog and Mixed-Signal VLSI, Macao
2.Instituto Superior Técnico, Universidade de Lisboa, Lisbon, Portugal
First Author AffilicationUniversity of Macau
Corresponding Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Zhang, Xiongjie,Zhao, Anyang,Li, Xinman,et al. An 80W Single-Inductor DC-DC Architecture for Simultaneous Flash Charging and Dual-Output PoL Supply with 92.1% Peak Efficiency from 15V-to-28V Input to 12.6V/3.3V/1V Outputs Using 1.3mm3Inductor[C]:IEEE Computer Society, 2024, 61-64.
APA Zhang, Xiongjie., Zhao, Anyang., Li, Xinman., Jiang, Yang., Martins, Rui P.., & Mak, Pui In (2024). An 80W Single-Inductor DC-DC Architecture for Simultaneous Flash Charging and Dual-Output PoL Supply with 92.1% Peak Efficiency from 15V-to-28V Input to 12.6V/3.3V/1V Outputs Using 1.3mm3Inductor. European Solid-State Circuits Conference, Proceeding of 2024 IEEE European Solid-State Electronics Research Conference (ESSERC), 61-64.
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