| Residential College | false |
| Status | 即將出版Forthcoming |
| A 362-TOPS/W Mixed-Signal MAC Macro With Sampling-Weight-Nonlinearity Cancellation and Dynamic-Amplified Accumulation | |
Zhang, Ran1,2; Cen, Xueru1,2; Un, Ka Fai1 ; Guo, Mingqiang1; Qi, Liang3; Martins, Rui P.1,4; Sin, Sai Weng1
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| 2025 | |
| Source Publication | IEEE Transactions on Circuits and Systems I: Regular Papers
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| ISSN | 1549-8328 |
| Abstract | This work presents a high energy-efficiency mixed-signal multiply-and-accumulate (MAC) macro in charge-domain for machine learning (ML) systems. It involves crucial features aimed at enhancing energy efficiency, throughput, and area efficiency, namely: 1) a parallel-serial (ParSer) scheme to augment the throughput by parallel input channels and reduce the power via serial analog accumulation rather than digital summation; 2) the weight-independent parallel digital-to-analog converter (DAC) sampling (WIPDS) to cancel weight nonlinearity during sampling and allow for resource-efficient DAC, significantly saving power and area; 3) a high energy-efficiency dynamic amplifier (DA) introduced to improve drivability and counteract attenuation of the serial accumulation, thereby attaining the desired accuracy with relaxed the afterward analog-to-digital converter (ADC) resolution and consequently reducing power consumption; 4) an optimized SAR ADC to reach higher energy efficiency. Fabricated in 28-nm CMOS technology, the prototype exhibits a peak energy and area efficiency of 362 TOPS/W and 3.23 TOPS/mm, respectively. |
| Keyword | DAC driver dynamic amplifier Machine learning (ML) mixed-signal multiply-and-accumulate (MAC) multi-bit neural network |
| DOI | 10.1109/TCSI.2024.3523888 |
| URL | View the original |
| Language | 英語English |
| Scopus ID | 2-s2.0-85214709375 |
| Fulltext Access | |
| Citation statistics | |
| Document Type | Journal article |
| Collection | DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING INSTITUTE OF MICROELECTRONICS |
| Affiliation | 1.University of Macau, State-Key Laboratory of Analog and Mixed-Signal VLSI, Institute of Microelectronics, The Faculty of Science and Technology, Department of ECE, Macau, Macao 2.UM Hetao IC Research Institute, Shenzhen, 518000, China 3.Shanghai Jiao Tong University, Department of Micro/Nano Electronics, Shanghai, 200240, China 4.Universidade de Lisboa, Instituto Superior Técnico, Lisbon, 1049-001, Portugal |
| First Author Affilication | Faculty of Science and Technology |
| Recommended Citation GB/T 7714 | Zhang, Ran,Cen, Xueru,Un, Ka Fai,et al. A 362-TOPS/W Mixed-Signal MAC Macro With Sampling-Weight-Nonlinearity Cancellation and Dynamic-Amplified Accumulation[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2025. |
| APA | Zhang, Ran., Cen, Xueru., Un, Ka Fai., Guo, Mingqiang., Qi, Liang., Martins, Rui P.., & Sin, Sai Weng (2025). A 362-TOPS/W Mixed-Signal MAC Macro With Sampling-Weight-Nonlinearity Cancellation and Dynamic-Amplified Accumulation. IEEE Transactions on Circuits and Systems I: Regular Papers. |
| MLA | Zhang, Ran,et al."A 362-TOPS/W Mixed-Signal MAC Macro With Sampling-Weight-Nonlinearity Cancellation and Dynamic-Amplified Accumulation".IEEE Transactions on Circuits and Systems I: Regular Papers (2025). |
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