Residential Collegefalse
Patent NumberUS8466823B2
Status已授權 Granted
Cascade analog-to-digital converting system
Year Issued2013
2013-06-18
Application Number13/198,856
Application Date2011-08-05
Rights HolderUniversity of Macau
U-Fat CHIO; He-Gong Wei; Yan Zhu; Sai-Weng Sin; Seng-Pan U; Rui Paulo da Silva Martins; Franco Maloberti
Date Available2012-08-02
CountryUnited States
Subtype发明专利 Invention
Abstract

A novel analog-to-digital converter (ADC) system using a two-step conversion is disclosed. The ADC system is capable of achieving high sampling rate, low power consumption and low complexity. The new proposed ADC is formed by cascading a flash ADC having high sampling rate and low resolution with a successive approximation (SA) ADC having low power consumption and low sampling rate.

Language英語English
Open (Notice) NumberUS20120194364A1
IPC Classification NumberH03m1/12
CPC Classification NumberH03m1/145 ; H03m1/0695 ; H03m1/365 ; H03m1/46
AgencyBacon & Thomas, Pllc
URLView the original
Document TypePatent
CollectionDEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Faculty of Science and Technology
INSTITUTE OF MICROELECTRONICS
AffiliationUniversity of Macau
Recommended Citation
GB/T 7714
U-Fat CHIO,He-Gong Wei,Yan Zhu,et al. Cascade analog-to-digital converting system. US8466823B2[P]. 2013-06-18.
APA U-Fat CHIO., He-Gong Wei., Yan Zhu., Sai-Weng Sin., Seng-Pan U., Rui Paulo da Silva Martins., & Franco Maloberti (2011-08-05). Cascade analog-to-digital converting system.
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