A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS

doi:10.1109/JSSC.2018.2852326

Residential College	false
Status	已發表Published
	A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS
	Wang,Wei 1; Zhu,Yan 1; Chan,Chi Hang 1; Martins,Rui Paulo 1,2,3
	2018-10-01
Source Publication	IEEE Journal of Solid-State Circuits
ISSN	00189200
Volume	53 Issue:10 Pages:2783-2794
Abstract	This paper reports a continuous-time (CT) third-order delta-sigma modulator that features a single amplifier biquad (SAB) and a passive integrator to simplify the circuit to just one power hungry operation amplifier (opamp). Such setup not only relaxes the gain and bandwidth requirement of the opamp design but also enhances the overall modulator stability which enables a power-efficient loop filter implementation. We used an SAR architecture in the quantizer with an advanced feedback technique to alleviate its speed penalty. By incorporating the proposed CT complementary (CTC) opamp and an adaptive latch scheme in the DAC driver, the modulator attains a signal bandwidth of 10 MHz with 79.6-dB signal-to-noise and distortion ratio (SNDR) while only consuming 5.35 mW from 1.2-and 1.8-V power supplies. The prototype has a dynamic range of 84.5 dB and a Schreier FoM of 177.2 dB with an active area of 0.033 mm .
Keyword	Analog-to-digital Conversion (Adc) Continuous-time (Ct) Delta-sigma Modulator Dac Driver Passive Integrator Single Amplifier Biquad (Sab)
DOI	10.1109/JSSC.2018.2852326
URL	View the original
Language	英語English
WOS ID	WOS:000446116400006
Scopus ID	2-s2.0-85050601647
Fulltext Access	View Full-Text via DOI View Full-Text via Web of Science View Full-Text via Scopus
Citation statistics
Document Type	Journal article
Collection	University of Macau
Corresponding Author	Zhu,Yan
Affiliation	1.State Key Laboratory of Analog and Mixed-Signal VLSI,University of Macau,,Macao 2.Department of Electrical and Computer Engineering,Faculty of Science and Technology,University of Macau,,Macao 3.Instituto Superior Técnico,Universidade de Lisboa,,Lisbon,Portugal
First Author Affilication	University of Macau
Corresponding Author Affilication	University of Macau
Recommended Citation GB/T 7714	Wang,Wei,Zhu,Yan,Chan,Chi Hang,et al. A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS[J]. IEEE Journal of Solid-State Circuits, 2018, 53(10), 2783-2794.
APA	Wang,Wei., Zhu,Yan., Chan,Chi Hang., & Martins,Rui Paulo (2018). A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS. IEEE Journal of Solid-State Circuits, 53(10), 2783-2794.
MLA	Wang,Wei,et al."A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS".IEEE Journal of Solid-State Circuits 53.10(2018):2783-2794.

Files in This Item:
There are no files associated with this item.

If you have any objections to this item, please fill out the form below and the administrator will contact you as soon as possible.
Content:
Email：	*
Affiliation No.
Verification Code:	Refresh

Any comments and suggestions are welcomed.
Title:	*
Content:
Email：	*
Verification Code:	Refresh