Residential College | false |
Status | 已發表Published |
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Delta Sigma Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS | |
Wang, Wei; Zhu, Yan; Chan, Chi-Hang; Martins, Rui Paulo | |
2018-10 | |
Conference Name | IEEE JOURNAL OF SOLID-STATE CIRCUITS |
Volume | 53 |
Issue | 10 |
Pages | 2783-2794 |
Conference Date | NOV 06-08, 2017 |
Conference Place | Seoul, SOUTH KOREA |
Publication Place | 445 HOES LANE, PISCATAWAY, NJ 08855-4141 USA |
Publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
Abstract | This paper reports a continuous-time (CT) third-order delta-sigma modulator that features a single amplifier biquad (SAB) and a passive integrator to simplify the circuit to just one power hungry operation amplifier (opamp). Such setup not only relaxes the gain and bandwidth requirement of the opamp design but also enhances the overall modulator stability which enables a power-efficient loop filter implementation. We used an SAR architecture in the quantizer with an advanced feedback technique to alleviate its speed penalty. By incorporating the proposed CT complementary (CTC) opamp and an adaptive latch scheme in the DAC driver, the modulator attains a signal bandwidth of 10 MHz with 79.6-dB signal-to-noise and distortion ratio (SNDR) while only consuming 5.35 mW from 1.2- and 1.8-V power supplies. The prototype has a dynamic range of 84.5 dB and a Schreier FoM of 177.2 dB with an active area of 0.033 mm(2). |
Keyword | Terms-analog-to-digital Conversion (Adc) Continuous-time (Ct) Delta-sigma Modulator Dac Driver Passive Integrator Single Amplifier Biquad (Sab) |
DOI | 10.1109/JSSC.2018.2852326 |
URL | View the original |
Indexed By | SCIE |
Language | 英語English |
WOS Research Area | Engineering |
WOS Subject | Engineering, Electrical & Electronic |
WOS ID | WOS:000446116400006 |
The Source to Article | WOS |
Scopus ID | 2-s2.0-85050601647 |
Fulltext Access | |
Citation statistics | |
Document Type | Conference paper |
Collection | University of Macau |
Corresponding Author | Zhu, Yan |
Recommended Citation GB/T 7714 | Wang, Wei,Zhu, Yan,Chan, Chi-Hang,et al. A 5.35-mW 10-MHz Single-Opamp Third-Order CT Delta Sigma Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS[C], 445 HOES LANE, PISCATAWAY, NJ 08855-4141 USA:IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2018, 2783-2794. |
APA | Wang, Wei., Zhu, Yan., Chan, Chi-Hang., & Martins, Rui Paulo (2018). A 5.35-mW 10-MHz Single-Opamp Third-Order CT Delta Sigma Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS. , 53(10), 2783-2794. |
Files in This Item: | There are no files associated with this item. |
Items in the repository are protected by copyright, with all rights reserved, unless otherwise indicated.
Edit Comment