| Residential College | false |
| Status | 已發表Published |
| A 0.003-mm2 440fsRMS-Jitter and-64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS | |
Yang,Zunsong1; Chen,Yong1 ; Mak,Pui In1; Martins,Rui P.1,2
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| 2020-04 | |
| Conference Name | 2019 IEEE Asian Solid-State Circuits Conference (A-SSCC) |
| Source Publication | Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019
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| Pages | 283-284 |
| Conference Date | 4-6 Nov. 2019 |
| Conference Place | Macau |
| Abstract | This paper reports a current-reuse sampling phase detector for a type-I phase-locked loop (PLL) to simultaneously achieve both wide loop bandwidth and low control voltage ripple, resulting in low RMS jitter and reference spur, while minimizing the chip area by avoiding an explicit loop filter. Fabricated in 28-nm CMOS, the PLL prototype measures a jitter of 440 fs, and a spur level of-64 dBc at 3.296 GHz. The die area is 0.003 mm. |
| Keyword | Phase Detector Phase Locked Loop (Pll) Reference Spur Ring Voltage-controlled Oscillator (Vco) Rms Jitter |
| DOI | 10.1109/A-SSCC47793.2019.9056944 |
| URL | View the original |
| Indexed By | SCIE |
| Language | 英語English |
| WOS Research Area | Engineering |
| WOS Subject | Engineering, Electrical & Electronic |
| WOS ID | WOS:000655248200003 |
| Scopus ID | 2-s2.0-85083668780 |
| Fulltext Access | |
| Citation statistics | |
| Document Type | Conference paper |
| Collection | THE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU) Faculty of Science and Technology INSTITUTE OF MICROELECTRONICS DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING |
| Affiliation | 1.State Key Laboratory of Analog and Mixed-Signal VLSI,IME,FST-ECE,University of Macau,Macao 2.Instituto Superior Técnico,Universidade de Lisboa,Portugal |
| First Author Affilication | Faculty of Science and Technology |
| Recommended Citation GB/T 7714 | Yang,Zunsong,Chen,Yong,Mak,Pui In,et al. A 0.003-mm2 440fsRMS-Jitter and-64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS[C], 2020, 283-284. |
| APA | Yang,Zunsong., Chen,Yong., Mak,Pui In., & Martins,Rui P. (2020). A 0.003-mm2 440fsRMS-Jitter and-64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS. Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019, 283-284. |
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