Residential College | false |
Status | 已發表Published |
A Time-Domain CMOS Temperature Sensor Using Gated Ring Oscillator with Linearity Optimization | |
Liu, Yangyang1; Lei, Yu1; Law, Man Kay1; Veigas, Bruno2; Mak, Pui In1; Martins, Rui P.1,3 | |
2021-07-15 | |
Conference Name | 2021 International Symposium on Signals, Circuits and Systems (ISSCS) |
Source Publication | ISSCS 2021 - International Symposium on Signals, Circuits and Systems |
Conference Date | 15 July 2021through 16 July 2021 |
Conference Place | Lasi |
Country | Romania |
Abstract | This paper presents a time-domain CMOS temperature sensor with linearity optimization. We employ a bipolar junction transistor (BJT)-based frontend together with an on-chip temperature-compensated gated ring oscillator (GRO) with intrinsic first-order noise shaping to achieve both high linearity and accuracy. This work also systemically optimizes the nonlinearity introduced by: 1) the curvature of VBE;2) the voltageto-Time conversion; and 3) the quantization error. Implemented in a standard 0.1\mathrm{S}-\mu \mathrm{m} CMOS process, this work demonstrates an inaccuracy of \pm 0.35{\circ}\mathrm{C} and a conversion time of 0.165ms over a wide temperature range from-40 to 125{\circ}\mathrm{C}, featuring a favorable accuracy-and resolution-FOM of 0.64nJ% 2 and 17.4\mathrm{p}\mathrm{J}{\circ}\mathrm{C}{2}, respectively. |
Keyword | Bjt Cmos Temperature Sensor Gated Ring Oscillator Linearity Optimization Time Domain |
DOI | 10.1109/ISSCS52333.2021.9497436 |
URL | View the original |
Language | 英語English |
Scopus ID | 2-s2.0-85114458212 |
Fulltext Access | |
Citation statistics | |
Document Type | Conference paper |
Collection | THE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU) Faculty of Science and Technology INSTITUTE OF MICROELECTRONICS DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING |
Affiliation | 1.IME and FST-ECE, University of Macau, State Key Laboratory of Analog and Mixed-Signal VLSI, Macao, Macao 2.Universidade NOVA de Lisboa, Faculty of Science and Technology, i3N CENIMAT, Department of Materials Science, Portugal 3.Instituto Superior Tecnico, Universidade de Lisboa, Portugal |
First Author Affilication | Faculty of Science and Technology |
Recommended Citation GB/T 7714 | Liu, Yangyang,Lei, Yu,Law, Man Kay,et al. A Time-Domain CMOS Temperature Sensor Using Gated Ring Oscillator with Linearity Optimization[C], 2021. |
APA | Liu, Yangyang., Lei, Yu., Law, Man Kay., Veigas, Bruno., Mak, Pui In., & Martins, Rui P. (2021). A Time-Domain CMOS Temperature Sensor Using Gated Ring Oscillator with Linearity Optimization. ISSCS 2021 - International Symposium on Signals, Circuits and Systems. |
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