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A Single-Opamp Third Order CT Δ Σ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp
Xing, Kai; Wang, Wei; Zhu, Yan; Chan, Chi Hang; Martins, Rui P.
2022-01
Source PublicationIEEE Transactions on Circuits and Systems I: Regular Papers
ISSN1549-8328
Volume69Issue:1Pages:64-74
Abstract

This paper proposes a 3rd order continuous-time delta-sigma modulator (CTDSM) with a single amplifier biquad (SAB) and excess loop delay (ELD) merged integrator. The integrator enables a 2nd order noise-shaping together with ELD compensation with just a single Opamp and feedback DAC. A three-stage Opamp with a hybrid frequency-compensation scheme is presented, which achieves high gain and large unity-gain bandwidth (UGBW) with low power. The circuit secures an extra order noise-shaping through a passive noise-shaping SAR (NS-SAR) quantizer (QTZ) while further incorporating a preliminary sampling and quantization (PSQ) technique, the 1st order NS QTZ can run at 1.5 GHz with 6b. The design, implemented in 28 nm, obtains 74.4 dB SNDR with 50 MHz bandwidth while consuming 10.4 mW from 1.5 V and 1 V power supplies. The prototype attains a dynamic range of 80.6 dB with a Schreier FOM of 171.2 dB. With the presented integrator and Opamp, the loop filter only consumes 14 % of the total DSM power consumption.

KeywordAnalog-to-digital Conversion (Adc) Continuous-time Delta-sigma Modulator (Ctdsm) Gain High-speed Noise-shaping Sar (ns-Sar). Loading Low-frequency Noise Modulation Preliminary Sampling And Quantization (Psq) Technique Quantization (Signal) Sab-eld-merged Integrator Three-stage Opamp Topology Wideband
DOI10.1109/TCSI.2021.3098826
URLView the original
Indexed BySCIE
Language英語English
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000732322700001
Scopus ID2-s2.0-85112645283
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Citation statistics
Document TypeJournal article
CollectionTHE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU)
INSTITUTE OF MICROELECTRONICS
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Corresponding AuthorChan, Chi Hang
AffiliationState Key Laboratory of Analog and Mixed Signal VLSI, Department of Electrical and Computer Engineering, Faculty of Science and Technology, Institute of Microelectronics, University of Macau, Macao 999078, China.
First Author AffilicationFaculty of Science and Technology
Corresponding Author AffilicationFaculty of Science and Technology
Recommended Citation
GB/T 7714
Xing, Kai,Wang, Wei,Zhu, Yan,et al. A Single-Opamp Third Order CT Δ Σ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2022, 69(1), 64-74.
APA Xing, Kai., Wang, Wei., Zhu, Yan., Chan, Chi Hang., & Martins, Rui P. (2022). A Single-Opamp Third Order CT Δ Σ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp. IEEE Transactions on Circuits and Systems I: Regular Papers, 69(1), 64-74.
MLA Xing, Kai,et al."A Single-Opamp Third Order CT Δ Σ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp".IEEE Transactions on Circuits and Systems I: Regular Papers 69.1(2022):64-74.
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