This article proposes a high-performance trench MOSFET with multiple stepped accumulation layer for conduction enhancement. In the proposed device, a multiple stepped split-gate (SG) is employed and self-biased to form a conductive accumulation layer, which greatly improves the performances of the device. Numerical simulation results show that the specific ON-resistance of the device is 56.41 m Ω mm2 with a breakdown voltage (BV) of 145 V, which is reduced by 20.3% compared with the conventional trench SG MOSFET. Moreover, the reverse recovery time of the integrated Schottky diode of the proposed device is also reduced by 37.5%, since the multiple stepped accumulation layer can also enhance the conduction capability in the reverse conduction state. In addition, the average gate drive power consumption of the proposed device is reduced by more than 2% when the frequency ranges from 20 to 250 kHz in comparison with that of the conventional one.