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Design of digital phase locked sensor loop for paralleled inverters
Huang, Baoshan1,3; Xu, Wei2; Zou, Xinfeng2; Yuan, Shihua3
2013-11-01
Source PublicationSensor Letters
ISSN1546-198X
Volume11Issue:11Pages:2131-2133
Abstract

This paper focused on the principle of phase-locked loop (PLL), the modeling and parameter design were also introduced in detail. The traditional PLL which influenced on phase demodulation errors of inverters with no control interconnection were studied further. Meanwhile, this paper designed a digital phase-locked sensor loop (DPLL) based on DSP using the concept of digital phase-locking. The tracking of phase and frequency in paralleled inverter can be realized effectively and rapidly by using DPLL, and also the parallel operation of inverters with no interconnection is solved. Moreover, the simulation data of this method keep consistent with the phase, frequency and amplitude. At last, the efficiency of research work mentioned above has been shown by experiments and simulations.

DOI10.1166/sl.2013.2976
Indexed BySCIE
Language英語English
WOS Research AreaChemistry ; Electrochemistry ; Instruments & Instrumentation ; Physics
WOS SubjectChemistry, Analytical ; Electrochemistry ; Instruments & Instrumentation ; Physics, Applied
WOS IDWOS:000335871700023
PublisherAMER SCIENTIFIC PUBLISHERS26650 THE OLD RD, STE 208, VALENCIA, CA 91381-0751
The Source to ArticleEngineering Village
Scopus ID2-s2.0-84897047287
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Citation statistics
Document TypeJournal article
CollectionUniversity of Macau
Corresponding AuthorHuang, Baoshan
Affiliation1.Beijing Institute of Technology, Zhuhai, China;
2.University of Macau, China;
3.National Key Laboratory of Vehicular Transmission, Beijing Institute of Technology, Beijing, China
Recommended Citation
GB/T 7714
Huang, Baoshan,Xu, Wei,Zou, Xinfeng,et al. Design of digital phase locked sensor loop for paralleled inverters[J]. Sensor Letters, 2013, 11(11), 2131-2133.
APA Huang, Baoshan., Xu, Wei., Zou, Xinfeng., & Yuan, Shihua (2013). Design of digital phase locked sensor loop for paralleled inverters. Sensor Letters, 11(11), 2131-2133.
MLA Huang, Baoshan,et al."Design of digital phase locked sensor loop for paralleled inverters".Sensor Letters 11.11(2013):2131-2133.
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