This brief reports a passive noise-shaping (PNS) scheme for successive approximation register (SAR) analog-to-digital converter (ADC) based on the two-step integration with passive gain and comparator gain techniques. The analysis shows that the proposed method achieves a better noise-shaping (NS) efficiency than prior arts, which enhances the noise attenuation by 14 dB. A design example is provided which further adopts the delta-sampling technique to relieve the conversion efficiency loss due to the oversampling in the NS SAR ADC. The efficiency of the proposed PNS scheme and the performance of the ADC are verified by simulation achieving a 13.2 effective number of bits with a 10-b ADC architecture and eight conversion cycles for a signal bandwidth of 2 MHz sampled at 100 MS/s. The calculated Schreier figure of merit (FoM) and Walden FoM are 176.8 dB and 16 fJ/conv.-step, respectively.