Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial Vcm -Based Switching

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	Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial Vcm -Based Switching
	Chan, C. H.; Zhu, Y.; Sin, S. W.; Martins, R. P.
	2017-03-01
Source Publication	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ISSN	1063-8210
Pages	1168-1172
Abstract	This brief presents a 7-bit 700-MS/s four-way time-interleaved successive approximation register (SAR) analog-to-digital converter (ADC). A partial Vcm-based switching method is proposed that requires less digital overhead from the SAR controller and achieves better conversion accuracy. Compared with switchback switching, the proposed method can further reduce the common mode variation by 50%. In addition, the impacts of such a reduction on the comparator offset, noise, and input parasitic are theoretically analyzed and verified by simulation. The prototype fabricated in a 65-nm CMOS technology occupies an active area of 0.025 mm2. The measurement results at the 700 MS/s sampling rate show that the ADC achieves signal-to-noise-and-distortion ratio of 40 dB at Nyquist input and consumes 2.72 mW from a 1.2 V supply, which results in a Walden FoM of 48 fJ/conversion step.
Keyword	Common mode variation partial Vcm-based switching time-interleaved successive approximation register analog-to-digital converter (TI SAR ADC)
URL	View the original
Language	英語English
The Source to Article	PB_Publication
PUB ID	43864
Document Type	Journal article
Collection	University of Macau
Recommended Citation GB/T 7714	Chan, C. H.,Zhu, Y.,Sin, S. W.,et al. Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial Vcm -Based Switching[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017, 1168-1172.
APA	Chan, C. H.., Zhu, Y.., Sin, S. W.., & Martins, R. P. (2017). Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial Vcm -Based Switching. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1168-1172.
MLA	Chan, C. H.,et al."Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial Vcm -Based Switching".IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2017):1168-1172.

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