Residential College | false |
Status | 已發表Published |
A 0.003-mm2 440fsRMS-Jitter and −64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS | |
Yang, Z.; Chen, Y.; Mak, P. I.; Martins, R. P. | |
2021-03-17 | |
Source Publication | IEEE Transactions on Circuits and Systems I: Regular Papers |
ISSN | xxxx |
Pages | 2307 -2316 |
Abstract | This paper presents a linear current-reuse sampling phase detector for a single-loop type-I phase-locked loop (PLL) to simultaneously achieve a wide loop bandwidth and low control voltage ripple, resulting in low RMS jitter and reference spur, while minimizing the chip area by avoiding an explicit loop filter. Fabricated in 28-nm CMOS, the PLL prototype measures an integrated jitter of 440 fs RMS , and a spur level of −63.9 dBc at 3.296 GHz. It draws 3.3 mW at a 0.9-V supply and scores a jitter-power figure-of-merit (FoM) of −241.9 dB. With a 103-MHz reference input, a bandwidth of ~20 MHz aids suppressing significantly the ring VCO’s phase noise (PN), leading to an in-band PN of −116 dBc/Hz at 1-MHz offset. The die size is 0.003 mm 2 . |
Keyword | CMOS PLL Jitter |
URL | View the original |
Language | 英語English |
The Source to Article | PB_Publication |
PUB ID | 59551 |
Document Type | Journal article |
Collection | INSTITUTE OF MICROELECTRONICS |
Corresponding Author | Chen, Y. |
Recommended Citation GB/T 7714 | Yang, Z.,Chen, Y.,Mak, P. I.,et al. A 0.003-mm2 440fsRMS-Jitter and −64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2021, 2307 -2316. |
APA | Yang, Z.., Chen, Y.., Mak, P. I.., & Martins, R. P. (2021). A 0.003-mm2 440fsRMS-Jitter and −64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS. IEEE Transactions on Circuits and Systems I: Regular Papers, 2307 -2316. |
MLA | Yang, Z.,et al."A 0.003-mm2 440fsRMS-Jitter and −64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS".IEEE Transactions on Circuits and Systems I: Regular Papers (2021):2307 -2316. |
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