This paper presents a Correlational Combination (CC) algorithm and its hardware implementation to be used in future multi-channel real-time spike sorting systems. Preprocessing of neural spikes are required to eliminate duplication for neural spikes recorded from a neural probe with densely spaced recording channels. In this work, we proposed using Pearson's correlation to identify duplicated neural spikes and to combine them selectively to improve SNR for a representative spike prior to performing spike sorting. Other approaches (Single Selection and Average All) were also compared with simulated multi-channel neural spikes and CC has the highest SNR for both software and hardware implementations. A hardware implementation of the CC algorithm was realized with a Xilinx Zynq-UltraScale+ field programmable gate array (FPGA). A SNR improvement of 93% was achieved when compared to the other approaches. A processing latency of 1.58μmu s for the CC hardware module was achieved when a 250MHz system clock was used to drive the FPGA.