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A High-Performance Dual-Topology CMOS Rectifier With 19.5-dB Power Dynamic Range for RF-Based Hybrid Energy Harvesting Journal article
Choo,Alexander, Ramiah,Harikrishnan, Churchill,Kishore Kumar Pakkirisami, Chen,Yong, Mekhilef,Saad, Mak,Pui In, Martins,Rui P.. A High-Performance Dual-Topology CMOS Rectifier With 19.5-dB Power Dynamic Range for RF-Based Hybrid Energy Harvesting[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023, 31(8), 1253-1257.
Authors:  Choo,Alexander;  Ramiah,Harikrishnan;  Churchill,Kishore Kumar Pakkirisami;  Chen,Yong;  Mekhilef,Saad; et al.
Favorite | TC[WOS]:7 TC[Scopus]:7  IF:2.8/2.8 | Submit date：2023/08/03
Power Conversion Efficiency (Pce)  Power Dynamic Range (Pdr)  Radio Frequency (Rf)-based Hybrid Energy Harvesting (Rf-heh)  
A 0.0043-mm 0.085- W/MHz Relaxation Oscillator Using Charge-Prestored Asymmetric Swings R-RC Network Journal article
Wei,Yuchen, Yang,Shiheng, Liu,Yueduo, Bao,Rongxin, Zhu,Zihao, Lin,Jiahui, Zhang,Zehao, Chen,Yong, Yin,Jun, Mak,Pui In, Li,Qiang. A 0.0043-mm 0.085- W/MHz Relaxation Oscillator Using Charge-Prestored Asymmetric Swings R-RC Network[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023, 31(8), 1248-1252.
Authors:  Wei,Yuchen;  Yang,Shiheng;  Liu,Yueduo;  Bao,Rongxin;  Zhu,Zihao; et al.
Favorite | TC[WOS]:1 TC[Scopus]:2  IF:2.8/2.8 | Submit date：2023/08/03
Charge-prestored  Cmos  Energy Efficient  Inverter-based  Low Power  R-rc  Relaxation Oscillator  
A 4.5-W, 18.5–24.5-GHz GaN Power Amplifier Employing Chebyshev Matching Technique Journal article
Yujia, Wang, Jincheng, Zhang, Yong, Chen, Junyan, Ren, Shunli, Ma. A 4.5-W, 18.5–24.5-GHz GaN Power Amplifier Employing Chebyshev Matching Technique[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023, 31(2), 233-242.
Authors:  Yujia, Wang;  Jincheng, Zhang;  Yong, Chen;  Junyan, Ren;  Shunli, Ma
Favorite | TC[WOS]:2 TC[Scopus]:5  IF:2.8/2.8 | Submit date：2023/01/30
Chebyshev Matching Technique  Gallium Nitride (Gan)  Power Added Efficiency (Pae)  Power Amplifier (Pa)  Satellite Communication  Wideband Matching Network  
A 3.6-GHz Type-II Sampling PLL With a Differential Parallel-Series Double-Edge S-PD Scoring 43.1-fsRMS Jitter, −258.7-dB FOM, and −75.17-dBc Reference Spur Journal article
Yunbo Huang, Yong Chen, Bo Zhao, Pui-In Mak, Rui P. Martins. A 3.6-GHz Type-II Sampling PLL With a Differential Parallel-Series Double-Edge S-PD Scoring 43.1-fsRMS Jitter, −258.7-dB FOM, and −75.17-dBc Reference Spur[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2022, 31(2), 188-198.
Authors:  Yunbo Huang;  Yong Chen;  Bo Zhao;  Pui-In Mak;  Rui P. Martins
Favorite | TC[WOS]:4 TC[Scopus]:9  IF:2.8/2.8 | Submit date：2023/02/22
Cmos  Figure-of-merit (Fom)  Harmonic-rich Voltage-controlled Oscillator (Vco)  Integrated Jitter, Phase-detection Gain (Kpd)  Reference (Ref) Feedthrough Suppression  Sampling Phase-locked Loop (S-pll)  Reference (Ref) Feedthrough Suppression  Type-i  Type-ii  
A Security-Enhanced, Charge-Pump-Free, ISO14443-A-/ISO10373-6-Compliant RFID Tag With 16.2-μW Embedded RRAM and Reconfigurable Strong PUF Journal article
Qirui Ren, Qiang Huo, Zhisheng Chen, Qi Gao, Yiming Wang, Yiming Yang, Hao Wu, Xiangqu Fu, Xiaoxin Xu, Qing Luo, Jianfeng Gao, Chengying Chen, Xiaojin Zhao, Dengyun Lei, Xinghua Wang, Feng Zhang, Yong Chen, Pui-In Mak. A Security-Enhanced, Charge-Pump-Free, ISO14443-A-/ISO10373-6-Compliant RFID Tag With 16.2-μW Embedded RRAM and Reconfigurable Strong PUF[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2022, 31(2), 243-252.
Authors:  Qirui Ren;  Qiang Huo;  Zhisheng Chen;  Qi Gao;  Yiming Wang; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:2.8/2.8 | Submit date：2023/01/30
Current Sense Amplifier (Csa)  Low Cost  Low Power  Physical Unclonable Function (Puf)  Radio Frequency Identification Technology (Rfid)  Resistive Ram (rRam)  Security  
A -20-dBm Sensitivity RF Energy-Harvesting Rectifier Front End Using a Transformer IMN Journal article
Lian, Wen Xun, Ramiah, Harikrishnan, Chong, Gabriel, Churchill, Kishore Kumar Pakkirisami, Lai, Nai Shyan, Chen, Yong, Mak, Pui In, Martins, Rui P.. A -20-dBm Sensitivity RF Energy-Harvesting Rectifier Front End Using a Transformer IMN[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2022, 30(11), 1808-1812.
Authors:  Lian, Wen Xun;  Ramiah, Harikrishnan;  Chong, Gabriel;  Churchill, Kishore Kumar Pakkirisami;  Lai, Nai Shyan; et al.
Favorite | TC[WOS]:13 TC[Scopus]:17  IF:2.8/2.8 | Submit date：2022/12/01
Cross-coupled Differential Drive (Ccdd)  Impedance Matching Network (Imn)  Radio Frequency Energy Harvesting (Rfeh)  
A Reconfigurable CMOS Rectifier With 14-dB Power Dynamic Range Achieving >36-dB/mm FoM for RF-Based Hybrid Energy Harvesting Journal article
Choo, Alexander, Ramiah, Harikrishnan, Churchill, Kishore Kumar Pakkirisami, Chen, Yong, Mekhilef, Saad, Mak, Pui In, Martins, Rui P.. A Reconfigurable CMOS Rectifier With 14-dB Power Dynamic Range Achieving >36-dB/mm FoM for RF-Based Hybrid Energy Harvesting[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2022, 30(10), 1533-1537.
Authors:  Choo, Alexander;  Ramiah, Harikrishnan;  Churchill, Kishore Kumar Pakkirisami;  Chen, Yong;  Mekhilef, Saad; et al.
Favorite | TC[WOS]:17 TC[Scopus]:19  IF:2.8/2.8 | Submit date：2022/09/09
Cmos  Figure Of Merit (Fom)  Power Dynamic Range (Pdr)  Radio Frequency-based Hybrid Energy Harvesting (Rfheh)  
A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push-Pull SS-PD and a Fast-Locking FLL Achieving -82.2-dBc REF Spur and -255-dB FOM Journal article
Yang, Zunsong, Chen, Yong, Yuan, Jia, Mak, Pui In, Martins, Rui P.. A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push-Pull SS-PD and a Fast-Locking FLL Achieving -82.2-dBc REF Spur and -255-dB FOM[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021, 30(2), 238-242.
Authors:  Yang, Zunsong;  Chen, Yong;  Yuan, Jia;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:20 TC[Scopus]:21  IF:2.8/2.8 | Submit date：2022/03/04
Binary Frequency Shift Keying (Bfsk)  Frequency-locked Loop (Fll)  Integer-n  Phase Detector (Pd)  Phase Noise (Pn)  Phase-locked Loop (Pll)  Push-pull  Reference (Ref) Spur  Sub-sampling (Ss)  Voltage-controlled Oscillator (Vco)  
A Fully-Integrated 10-V Pulse Driver Using Multi-Band Pulse-Frequency Modulation in 65-nm CMOS Journal article
Wu, Jiangchao, Leong, Hou-Man, Jiang, Yang, Law, Man-Kay, Mak, Pui-In, Martins, Rui P.. A Fully-Integrated 10-V Pulse Driver Using Multi-Band Pulse-Frequency Modulation in 65-nm CMOS[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021, 29(9), 1665 - 1669.
Authors:  Wu, Jiangchao;  Leong, Hou-Man;  Jiang, Yang;  Law, Man-Kay;  Mak, Pui-In; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:2.8/2.8 | Submit date：2022/08/20
Driver  Fast Transition  Fully Integrated  High-voltage (Hv)  Pulse-frequency Modulation (Pfm)  
A 1-V 4-mW Differential-Folded Mixer with Common-Gate Transconductor Using Multiple Feedback Achieving 18.4-dB Conversion Gain, +12.5-dBm IIP3, and 8.5-dB NF Journal article
Vitee,Nandini, Ramiah,Harikrishnan, Mak,Pui In, Yin,Jun, Martins,Rui P.. A 1-V 4-mW Differential-Folded Mixer with Common-Gate Transconductor Using Multiple Feedback Achieving 18.4-dB Conversion Gain, +12.5-dBm IIP3, and 8.5-dB NF[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2020, 28(5), 1164-1174.
Authors:  Vitee,Nandini;  Ramiah,Harikrishnan;  Mak,Pui In;  Yin,Jun;  Martins,Rui P.
Favorite | TC[WOS]:5 TC[Scopus]:5  IF:2.8/2.8 | Submit date：2021/03/04
Capacitive Feedback  Cmos  High Linearity  Mixer  Positive Feedback  Third-order Intercept Point (Iip3)  Third-order Intermodulation (Im3) Cancellation