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A 5T-SRAM Based Computing-in-Memory Macro Featuring Partial Sum Boosting and Analog Non-Uniform Quantization Conference paper
Xin, Guoqiang, Tan, Fei, Li, Junde, Chen, Junren, Yu, Wei Han, Un, Ka Fai, Martins, Rui P., Mak, Pui In. A 5T-SRAM Based Computing-in-Memory Macro Featuring Partial Sum Boosting and Analog Non-Uniform Quantization[C]:Institute of Electrical and Electronics Engineers Inc., 2024, 882-887.
Authors:  Xin, Guoqiang;  Tan, Fei;  Li, Junde;  Chen, Junren;  Yu, Wei Han; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2024/10/10
5t-sram  Analog Non-uniform Quantization (Anuq)  Computing-in-memory (Clm)  Machine Learning (Ml)  Matrix-vector Multiplication (Mvm)  Partial Sum Boosting (Psb)  
Deterministic Policy Gradient based Reinforcement Learning for Current Control of Hybrid Active Power Filter Conference paper
Gong, Cheng, Leong, Chio Hong, Lam, Chi Seng. Deterministic Policy Gradient based Reinforcement Learning for Current Control of Hybrid Active Power Filter[C]:Institute of Electrical and Electronics Engineers Inc., 2024.
Authors:  Gong, Cheng;  Leong, Chio Hong;  Lam, Chi Seng
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2024/08/05
Deterministic Policy Gradient  Hybrid Active Power Filter  Power Quality  Reinforcement Learning  
Prediction of Subharmonic Oscillation in SIMO DC-DC Converter with Ordered Power Distributive Control in CCM and Peak Current Mode Conference paper
Yu, Zhewen, Mao, Fangyu, Lu, Yan. Prediction of Subharmonic Oscillation in SIMO DC-DC Converter with Ordered Power Distributive Control in CCM and Peak Current Mode[C]:IEEE, 2024.
Authors:  Yu, Zhewen;  Mao, Fangyu;  Lu, Yan
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2024/08/05
Dc-dc Converter  Ordered Power Distributive Control  Peak Current Mode Control  Single-inductor Multiple Output  Subharmonic Oscillation  
A Steady-state Operation Based Online Parameter Identification Method of Output Capacitor for DC-DC Buck Converters Conference paper
Leong, Chio Hong, Wong, Chi Kong, Gong, Cheng, Lam, Chi Seng. A Steady-state Operation Based Online Parameter Identification Method of Output Capacitor for DC-DC Buck Converters[C]:IEEE, 2024.
Authors:  Leong, Chio Hong;  Wong, Chi Kong;  Gong, Cheng;  Lam, Chi Seng
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2024/08/05
Buck Converter  Capacitance (c)  Equivalent Series Resistance (Esr)  Online Parameter Identification  Steady-state  
A GaN Driver with Almost Constant dv/dt during Miller Plateau for V-I Overlap Loss Reduction Conference paper
YANG YUNZHE, CHEN QIUJIN, YANG ZAITIAN, DU SIJUN, HUANG MO. A GaN Driver with Almost Constant dv/dt during Miller Plateau for V-I Overlap Loss Reduction[C]:IEEE, 2024.
Authors:  YANG YUNZHE;  CHEN QIUJIN;  YANG ZAITIAN;  DU SIJUN;  HUANG MO
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2024/07/22
Gan  Buck Converter  Dv/dt  Miller Plateau  V-i Overlap Loss  Emi  
A Delta-Sigma-Based Computing-In-Memory Macro Targeting Edge Computation Conference paper
ZHANG RAN, UN KA FAI, GUO MINGQIANG, QI LIANG, XU DENGKE, ZHAO WEIBING, RUI P. MARTINS, FRANCO MALOBERTI, SIN SAI WENG. A Delta-Sigma-Based Computing-In-Memory Macro Targeting Edge Computation[C]:IEEE, 2024.
Authors:  ZHANG RAN;  UN KA FAI;  GUO MINGQIANG;  QI LIANG;  XU DENGKE; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2024/08/19
Machine Learning  Edge Computation  Computing-in-memory  Delta-sigma Converter  Floating Inverter Amplifier  
A 9.97-GHz 190.6-dBc/Hz FOM CMOS VCO Featuring Nested Common-Mode Resonator and Intrinsic Differential 2nd-Harmonic Output Conference paper
Huang, Yunbo, Chen, Yong, Yang, Chaowei, Mak, Pui In, Martins, Rui P.. A 9.97-GHz 190.6-dBc/Hz FOM CMOS VCO Featuring Nested Common-Mode Resonator and Intrinsic Differential 2nd-Harmonic Output[C], USA:Institute of Electrical and Electronics Engineers Inc., 2023.
Authors:  Huang, Yunbo;  Chen, Yong;  Yang, Chaowei;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:0 TC[Scopus]:1 | Submit date：2024/02/23
1/f3pn Corner  Cmos  Common-mode (Cm) Resonance  Figure-of-merit (Fom)  Flicker (1/f) Noise  Impulse Sensitivity Function (Isf)  Noise Transfer  Phase Noise (Pn)  Quality Factor  Thermal Noise  Tuning Range (Tr)  Voltage-controlled Oscillator (Vco)  
A Two-Phase Linear-Exponential Incremental ADC with Second-order Noise Coupling Conference paper
Wang, Qingxun, Pan, Yuhan, Chen, Kaiquan, Lin, Yu, Wang, Biao, Qi, Liang. A Two-Phase Linear-Exponential Incremental ADC with Second-order Noise Coupling[C]:IEEE345 E 47TH ST, NEW YORK, NY 10017 USA, 2023.
Authors:  Wang, Qingxun;  Pan, Yuhan;  Chen, Kaiquan;  Lin, Yu;  Wang, Biao; et al.
Favorite | TC[WOS]:0 TC[Scopus]:1 | Submit date：2024/02/23
Incremental Analog-to-digital Converter (Iadc)  Linear-exponential  Second-order Noise Coupling (Nc)  The Effective Data Weighting Averaging (Dwa) And Suppression Of Thermal Noise  
An Auxiliary-Loop-Enhanced Fast-Transient FVF LDO as Reference Buffer of a SAR ADC Conference paper
Zeng, Yi, Chan, Chi Hang, Zhu, Yan, Martins, Rui P.. An Auxiliary-Loop-Enhanced Fast-Transient FVF LDO as Reference Buffer of a SAR ADC[C], 2022, 2660-2664.
Authors:  Zeng, Yi;  Chan, Chi Hang;  Zhu, Yan;  Martins, Rui P.
Favorite | TC[WOS]:1 TC[Scopus]:1 | Submit date：2023/01/30
Analog-to-digital Converter (Adc)  Flipped Voltage Follower (Fvf)  Reference Buffer  Successive Approximation Register (Sar)  
A Robust Hybrid CT/DT 0-2 MASH DSM with Passive Noise-Shaping SAR ADC Conference paper
Li, Ke, Sin, Sai Weng, Qi, Liang, Zhao, Weibing, Wang, Guoxing, Martins, R. P.. A Robust Hybrid CT/DT 0-2 MASH DSM with Passive Noise-Shaping SAR ADC[C], 2022, 551-555.
Authors:  Li, Ke;  Sin, Sai Weng;  Qi, Liang;  Zhao, Weibing;  Wang, Guoxing; et al.
Favorite | TC[WOS]:3 TC[Scopus]:3 | Submit date：2023/01/30
Delta-sigma Modulator (Dsm)  Hybrid Adc  Multi-stage Noise-shaping (Mash)  Noise-shaping Successive Approximation Register (Ns-sar)