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A SAR-ADC-Assisted DC-DC Converter with Fast Transient Recovery Journal article
Zeng, W. L., Bonizzoni, E., U, C.-W., Lam, C. S., Sin, S. W., Chio, U-F., Maloberti, F., Martins, R. P.. A SAR-ADC-Assisted DC-DC Converter with Fast Transient Recovery[J]. IEEE Transactions on Circuits and Systems II - Express Briefs, 2020, 1669-1673.
Authors:  Zeng, W. L.;  Bonizzoni, E.;  U, C.-W.;  Lam, C. S.;  Sin, S. W.; et al.
Favorite |   IF:4.0/3.7 | Submit date：2022/01/25
Adc  Current Pump  Additional Loop Compensation  Buck Converter  Dcm  Bond-wire Inductor  Fast Transient Recovery.  
A integrated dc-dc converter with segmented frequency modulation and multiphase co-work control for fast transient recovery Conference paper
Chio, U F., Wen, K. C., Sin, S. W., Lam, C. S., Lu, Y., Maloberti, F., Martins, R. P.. A integrated dc-dc converter with segmented frequency modulation and multiphase co-work control for fast transient recovery[C], Tainan, Taiwan:IEEE, 2018, 31-32.
Authors:  Chio, U F.;  Wen, K. C.;  Sin, S. W.;  Lam, C. S.;  Lu, Y.; et al.
Favorite |  | Submit date：2022/01/24
SC DC-DC converter  fully integrated  switched-capacitor  voltage-controlled oscillator (VCO)  
A 5-bit 2 GS/s binary-search ADC with charge-steering comparators Conference paper
Chio, U-Fat, Sin S.-W., Seng-Pan U., Maloberti F., Martins R.P.. A 5-bit 2 GS/s binary-search ADC with charge-steering comparators[C], 2017, 221-224.
Authors:  Chio, U-Fat;  Sin S.-W.;  Seng-Pan U.;  Maloberti F.;  Martins R.P.
Favorite | TC[WOS]:1 TC[Scopus]:3 | Submit date：2019/02/11
Binary-search Adc  Asynchronous  Charge-steering  
Self-Reconfiguration Property of a Mixed Signal Controller for Improving Power Qulaity Compensation During Light Loading Journal article
Wong, M. C., Yang, Y. Z. , Lam, C. S., Choi, W. H. , Dai, N. Y., Wu, Y. J. , Wong, C. K., Sin, S. W., Chio, U. F. , U, S. P. , Martins, R. P.. Self-Reconfiguration Property of a Mixed Signal Controller for Improving Power Qulaity Compensation During Light Loading[J]. IEEE Transaction on Power Electronics, 2015, 5938-5951.
Authors:  Wong, M. C.;  Yang, Y. Z. ;  Lam, C. S.;  Choi, W. H. ;  Dai, N. Y.; et al.
Favorite |   IF:6.6/6.9 | Submit date：2022/01/24
Power Electronics  Power Qulaity  
A 0.6 V 8b 100MS/s SAR ADC with Minimized DAC capacitance and switching energy in 65nm CMOS Conference paper
Wu, W. N., Zhu, Y., Ding, L., Chan, C. H., Chio, U. F., Sin, S. W., U, S. P., Martins, R. P.. A 0.6 V 8b 100MS/s SAR ADC with Minimized DAC capacitance and switching energy in 65nm CMOS[C], 2013.
Authors:  Wu, W. N.;  Zhu, Y.;  Ding, L.;  Chan, C. H.;  Chio, U. F.; et al.
Favorite |  | Submit date：2022/01/25
Switching Scheme  SAR ADC  DAC Design  
A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS Conference paper
Wei H., Chan C.-H., Chio U.-F., Sin S.-W., Seng-Pan U., Martins R., Maloberti F.. A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS[C], 2011, 188-189.
Authors:  Wei H.;  Chan C.-H.;  Chio U.-F.;  Sin S.-W.;  Seng-Pan U.; et al.
Favorite | TC[Scopus]:76 | Submit date：2019/02/11
An 11b 60MS/s 2.1mW two-step time-interleaved SAR-ADC with reused S&H Conference paper
Sin S.-W., Ding L., Zhu Y., Wei H.-G., Chan C.-H., Chio U.-F., Seng-Pan U., Martins R.P., Maloberti F.. An 11b 60MS/s 2.1mW two-step time-interleaved SAR-ADC with reused S&H[C], 2010, 218-221.
Authors:  Sin S.-W.;  Ding L.;  Zhu Y.;  Wei H.-G.;  Chan C.-H.; et al.
Favorite | TC[Scopus]:12 | Submit date：2019/02/11
A 10-bit 100-MS/s Reference-Free SAR ADC in 90nm CMOS Journal article
Zhu, Y., Chan, C.H., Chio, U.F., Sin, S. W., U, S.P., Martins, R. P., Maloberti, F.. A 10-bit 100-MS/s Reference-Free SAR ADC in 90nm CMOS[J]. IEEE Journal of Solid-State Circuits, 2010, 1111-1121.
Authors:  Zhu, Y.;  Chan, C.H.;  Chio, U.F.;  Sin, S. W.;  U, S.P.; et al.
Favorite |   IF:4.6/5.6 | Submit date：2022/01/25
Analog-to-digital Converter  Adc  Sar  Charge-recovery  Switched Technique  
Linearity Analysis On A Series-Split Capacitor Array for High-Speed SAR ADCs Journal article
Zhu, Y., Chio, U. F., Wei, H. G., Sin, S. W., Martins, R. P.. Linearity Analysis On A Series-Split Capacitor Array for High-Speed SAR ADCs[J]. VLSI Design, 2009, 1-10.
Authors:  Zhu, Y.;  Chio, U. F.;  Wei, H. G.;  Sin, S. W.;  Martins, R. P.
Favorite | TC[WOS]:14 TC[Scopus]:6 | Submit date：2022/01/24
Split Dac  Sar Adc  Linearity Analysis  
On-chip small capacitor mismatches measurement technique using beta-multiplier-biased ring oscillator Conference paper
Sin S.-W., Wei H.-G., Chio U.-F., Zhu Y., Seng-Pan U., Martins R.P., Maloberti F.. On-chip small capacitor mismatches measurement technique using beta-multiplier-biased ring oscillator[C], 2009, 49-52.
Authors:  Sin S.-W.;  Wei H.-G.;  Chio U.-F.;  Zhu Y.;  Seng-Pan U.; et al.
Favorite | TC[WOS]:6 TC[Scopus]:7 | Submit date：2019/02/11
Beta Multiplier And Constant Gm  Capacitor Mismatches Measurement  Ring Oscillator