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A SAR-ADC-Assisted DC-DC Buck Converter with Fast Transient Recovery
Journal article
Zeng,Wen Liang, Bonizzoni,Edoardo, U,Chi Wa, Lam,Chi Seng, Sin,Sai Weng, Chio,U. Fat, Maloberti,Franco, Martins,Rui Paulo. A SAR-ADC-Assisted DC-DC Buck Converter with Fast Transient Recovery[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2020, 67(9), 1669-1673.
Authors:
Zeng,Wen Liang
;
Bonizzoni,Edoardo
;
U,Chi Wa
;
Lam,Chi Seng
;
Sin,Sai Weng
; et al.
Favorite
|
TC[WOS]:
8
TC[Scopus]:
9
IF:
4.0
/
3.7
|
Submit date:2021/03/04
Adc
Current Pump
Additional Loop Compensation
Buck Converter
Dcm
Bond-wire Inductor
Fast Transient Recovery
Digital Battery Management Unit with Built-In Resistance Compensation and Accidental Mutation Protection for Fast and Accurate Charging
Conference paper
Li,Ji Xuan, Sin,Sai Weng, Chio,U. Fat, Wu,Ya Jie, Lam,Chi Seng, Martins,Rui Paulo. Digital Battery Management Unit with Built-In Resistance Compensation and Accidental Mutation Protection for Fast and Accurate Charging[C], 2019, 49-50.
Authors:
Li,Ji Xuan
;
Sin,Sai Weng
;
Chio,U. Fat
;
Wu,Ya Jie
;
Lam,Chi Seng
; et al.
Favorite
|
TC[WOS]:
7
TC[Scopus]:
2
|
Submit date:2021/03/09
Accidental Mutation Protection (Amp)
Built-in Resistance (Bir)
Constant Current (Cc)
Constant-voltage (Cv)
Fast Charging
An Integrated DC-DC Converter with Segmented Frequency Modulation and Multiphase Co-Work Control for Fast Transient Recovery
Journal article
Chio,U. Fat, Wen,Kuo Chih, Sin,Sai Weng, Lam,Chi Seng, Lu,Yan, Maloberti,Franco, Martins,Rui P.. An Integrated DC-DC Converter with Segmented Frequency Modulation and Multiphase Co-Work Control for Fast Transient Recovery[J]. IEEE Journal of Solid-State Circuits, 2019, 54(10), 2637-2648.
Authors:
Chio,U. Fat
;
Wen,Kuo Chih
;
Sin,Sai Weng
;
Lam,Chi Seng
;
Lu,Yan
; et al.
Favorite
|
TC[WOS]:
7
TC[Scopus]:
7
IF:
4.6
/
5.6
|
Submit date:2021/03/09
Fully Integrated
Sc Dc-dc Converter
Switched Capacitor (Sc)
Voltage-controlled Oscillator (Vco)
A 5-bit 2 GS/s binary-search ADC with charge-steering comparators
Conference paper
Chio, U-Fat, Sin S.-W., Seng-Pan U., Maloberti F., Martins R.P.. A 5-bit 2 GS/s binary-search ADC with charge-steering comparators[C], 2017, 221-224.
Authors:
Chio, U-Fat
;
Sin S.-W.
;
Seng-Pan U.
;
Maloberti F.
;
Martins R.P.
Favorite
|
TC[WOS]:
1
TC[Scopus]:
3
|
Submit date:2019/02/11
Binary-search Adc
Asynchronous
Charge-steering
A 0.024mm28b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS
Conference paper
Wei, Hegong, Chan, Chi-Hang, Chio, U.-Fat, Sin, Sai-Weng, Seng-Pan, U., Martins, Rui, Maloberti, Franco. A 0.024mm28b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS[C]. Institute of Electrical and Electronics Engineers Inc., 2011, 188-189.
Authors:
Wei, Hegong
;
Chan, Chi-Hang
;
Chio, U.-Fat
;
Sin, Sai-Weng
;
Seng-Pan, U.
; et al.
Favorite
|
TC[Scopus]:
76
|
Submit date:2018/11/06
Linearity analysis on a series-split capacitor array for high-speed SAR ADCs
Journal article
Zhu,Yan, Chio,U. Fat, Wei,He Gong, Sin,Sai Weng, Seng-Pan,U., Martins,R. P.. Linearity analysis on a series-split capacitor array for high-speed SAR ADCs[J]. VLSI Design, 2010, 2010.
Authors:
Zhu,Yan
;
Chio,U. Fat
;
Wei,He Gong
;
Sin,Sai Weng
;
Seng-Pan,U.
; et al.
Favorite
|
TC[WOS]:
14
TC[Scopus]:
6
IF:
0.138
/
0.000
|
Submit date:2021/03/09