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Area-efficient ultra-wide-tuning-range ring oscillators in 65-nm complementary metal–oxide–semiconductor Journal article
Yang, Chaowei, Chen, Yong, Cheng, Kai, Stefano, Crovetti Paolo, Martins, Rui P., Mak, Pui In. Area-efficient ultra-wide-tuning-range ring oscillators in 65-nm complementary metal–oxide–semiconductor[J]. International Journal of Circuit Theory and Applications, 2024.
Authors:  Yang, Chaowei;  Chen, Yong;  Cheng, Kai;  Stefano, Crovetti Paolo;  Martins, Rui P.; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:1.8/1.7 | Submit date：2024/08/05
Clock And Data Recovery (Cdr)  Cmos Figure-of-merit (Fom)  Figure-of-merit With Tuning And Area (Fomta)  Figure-of-merit With Tuning Range (Fomt)  Flicker (1/f)  Noise Noise Transfer Phase Noise (Pn)  Phase-locked Loop (Pll)  Quality Factor Switched-capacitor Array (Sca)  Thermal Noise Transformer Tuning Range (Tr)  Ultra-wide-tuning-range Voltage-controlled Oscillator (Vco)  
Guest Editorial: Digital-based and digital-intensive analog integrated circuits and systems Journal article
Crovetti, Paolo S., Chen, Yong. Guest Editorial: Digital-based and digital-intensive analog integrated circuits and systems[J]. Electronics Letters, 2024, 60(2).
Authors:  Crovetti, Paolo S.;  Chen, Yong
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:0.7/0.9 | Submit date：2024/05/16
A 0.012-mm2 0.244-pJ/bit successive approximation register analog-to-digital converter-based true random number generator for Internet of Things applications in a 65-nm complementary metal–oxide–semiconductor Journal article
Cheng, Kai, Chen, Yong, Stefano, Crovetti Paolo, Martins, Rui P., Mak, Pui In. A 0.012-mm2 0.244-pJ/bit successive approximation register analog-to-digital converter-based true random number generator for Internet of Things applications in a 65-nm complementary metal–oxide–semiconductor[J]. International Journal of Circuit Theory and Applications, 2024.
Authors:  Cheng, Kai;  Chen, Yong;  Stefano, Crovetti Paolo;  Martins, Rui P.;  Mak, Pui In
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:1.8/1.7 | Submit date：2024/06/05
Analog-to-digital Converter (Adc)  Capacitive Digital-to-analog Converters (Cdacs)  Cryptography  Entropy  National Institute Of StAndards And Technology (Nist)  Successive Approximation Register (Sar)  Thermal Noise  True Random Number Generator (Trng)  
Guest Editorial: Digital-based and digital-intensive analog integrated circuits and systems Other
2024-01-01
Authors:  Crovetti, Paolo S.;  Chen, Yong
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2024/02/22
A 28 nm 368 fJ/cycle, 0.43%/V Supply Sensitivity, FLL based RC Oscillator Featuring Positive TC Only Resistors and ΣM Based Trimming Journal article
Huang,Yunbo, Chen,Yong, Yang,Kaiyuan, Crovetti,Paolo, Mak,Pui In, Martins,Rui P.. A 28 nm 368 fJ/cycle, 0.43%/V Supply Sensitivity, FLL based RC Oscillator Featuring Positive TC Only Resistors and ΣM Based Trimming[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2023, 70(11), 3950-3954.
Authors:  Huang,Yunbo;  Chen,Yong;  Yang,Kaiyuan;  Crovetti,Paolo;  Mak,Pui In; et al.
Favorite | TC[WOS]:2 TC[Scopus]:2  IF:4.0/3.7 | Submit date：2023/08/03
Clocks  Cmos  Delta-sigma-modulator  Energy Efficiency  Frequency Inaccuracy  Frequency-locked-loop (Fll)  Generators  Oscillators  Rc Oscillator  Resistance  Resistors  Switched-capacitor Resistor  Switches  Temperature Coefficients  Voltage-controlled Oscillators  
A 6-to-38Gb/s capture-range bang-bang clock and data recovery circuit with deliberate-current-mismatch frequency detection and interpolation-based multiphase clock generation Journal article
Wang, Lin, Chen, Yong, Yang, Chaowei, Zhou, Xionghui, Han, Mei, Stefano, Crovetti Paolo, Mak, Pui In, Martins, Rui P.. A 6-to-38Gb/s capture-range bang-bang clock and data recovery circuit with deliberate-current-mismatch frequency detection and interpolation-based multiphase clock generation[J]. International Journal of Circuit Theory and Applications, 2023, 51(5), 1988-2015.
Authors:  Wang, Lin;  Chen, Yong;  Yang, Chaowei;  Zhou, Xionghui;  Han, Mei; et al.
Favorite | TC[WOS]:1 TC[Scopus]:2  IF:1.8/1.7 | Submit date：2023/06/05
Bang-bang Clock And Data Recovery (Bbcdr)  Current Mismatch  Frequency Detector (Fd)  Hybrid Control Circuit (Hcc)  Phase Interpolator (Pi)  R-2r Digital-to-analog Converter (Dac)  Ring Oscillator (Ro)  Switched-capacitor (Sc) Array  Wide Capture Range  
A 880 nW, 100 kS/s, 13 bit Differential Relaxation-DAC in 180 nm Conference paper
Rubino,Roberto, Musolino,Francesco, Chen,Yong, Richelli,Anna, Crovetti,Paolo. A 880 nW, 100 kS/s, 13 bit Differential Relaxation-DAC in 180 nm[C]. Bosch, et al., Huawei, Photeon Technologies, Synopsys:Institute of Electrical and Electronics Engineers Inc., 2023, 269-272.
Authors:  Rubino,Roberto;  Musolino,Francesco;  Chen,Yong;  Richelli,Anna;  Crovetti,Paolo
Favorite | TC[WOS]:3 TC[Scopus]:3 | Submit date：2023/08/03
Consumer Data Converter.  D/a Converter (Dac)  Digital Intensive  Relaxation D/a Converter (Redac)  Ultra-low Area  Ultra-low Power  
Correction: Zhang et al. A 7.4-Bit ENOB 600 MS/s FPGA-Based Online Calibrated Slope ADC without External Components. Sensors 2022, 22, 5852 Journal article
Mengdi Zhang, Ye Zhao, Yong Chen, Paolo Crovetti, Yanji Wang, Xinshun Ning, Shushan Qiao. Correction: Zhang et al. A 7.4-Bit ENOB 600 MS/s FPGA-Based Online Calibrated Slope ADC without External Components. Sensors 2022, 22, 5852[J]. SENSORS, 2022, 22(22), 8936.
Authors:  Mengdi Zhang;  Ye Zhao;  Yong Chen;  Paolo Crovetti;  Yanji Wang; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:3.4/3.7 | Submit date：2023/01/31
A 0.01mm2, 0.4V-VDD, 4.5nW-Power DC-Coupled Digital Acquisition Front-End Based on Time-Multiplexed Digital Differential Amplification Conference paper
Paolo Crovetti, Roberto Rubino, Pedro Toledo, Francesco Musolino, Hamilton Klimach, Yong Chen, Anna Richelli. A 0.01mm2, 0.4V-VDD, 4.5nW-Power DC-Coupled Digital Acquisition Front-End Based on Time-Multiplexed Digital Differential Amplification[C]:IEEE, 2022, 405-408.
Authors:  Paolo Crovetti;  Roberto Rubino;  Pedro Toledo;  Francesco Musolino;  Hamilton Klimach; et al.
Favorite | TC[Scopus]:3 | Submit date：2023/01/30
Cmos  Dc-coupled Digital Acquisition Front-end (Dafe)  Ecg  Iot  Time-multiplexed Digital Differential Amplification (Tmd2a)  
A 7.4-Bit ENOB 600 MS/s FPGA-Based Online Calibrated Slope ADC without External Components Journal article
Zhang, Mengdi, Zhao, Ye, Chen, Yong, Crovetti, Paolo, Wang, Yanji, Ning, Xinshun, Qiao, Shushan. A 7.4-Bit ENOB 600 MS/s FPGA-Based Online Calibrated Slope ADC without External Components[J]. Sensors (Basel, Switzerland), 2022, 22(22), 8936.
Authors:  Zhang, Mengdi;  Zhao, Ye;  Chen, Yong;  Crovetti, Paolo;  Wang, Yanji; et al.
Favorite | TC[WOS]:1 TC[Scopus]:1  IF:3.4/3.7 | Submit date：2022/09/07
Analog-to-digital Converter (Adc)  Differential Nonlinearity (Dnl)  Effective Number Of Bits (Enob)  Fpga  Integral Nonlinearity (Inl)  Time-to-digital Converter (Tdc)