UM

Browse/Search Results:  1-4 of 4 Help

Selected(0)Clear Items/Page:    Sort:
A 12-bit 1GS/s ADC With Background Distortion and Split-ADC-Like Gain Calibration Journal article
Wei, Lai, Zheng, Zihao, Markulic, Nereo, Lagos, Jorge, Martens, Ewout, Martins, Rui Paulo, Zhu, Yan, Craninckx, Jan, Chan, Chi Hang. A 12-bit 1GS/s ADC With Background Distortion and Split-ADC-Like Gain Calibration[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2023, 70(12), 4679-4691.
Authors:  Wei, Lai;  Zheng, Zihao;  Markulic, Nereo;  Lagos, Jorge;  Martens, Ewout; et al.
Favorite | TC[WOS]:3 TC[Scopus]:2  IF:5.2/4.5 | Submit date:2024/02/23
Analog-to-digital Converter  Cmos Analog Integrated Circuits  Distortion  Input Buffer  Split-adc-like Calibration  
An Auxiliary-Channel-Sharing Background Distortion and Gain Calibration Achieving >8dB SFDR Improvement over 4thNyquist Zone in 1GS/s ADC Conference paper
Wei, Lai, Zheng, Zihao, Markulic, Nereo, Lagos, Jorge, Martens, Ewout, Zhu, Yan, Chan, Chi Hang, Craninckx, Jan, Martins, Rui Paulo. An Auxiliary-Channel-Sharing Background Distortion and Gain Calibration Achieving >8dB SFDR Improvement over 4thNyquist Zone in 1GS/s ADC[C], 2021.
Authors:  Wei, Lai;  Zheng, Zihao;  Markulic, Nereo;  Lagos, Jorge;  Martens, Ewout; et al.
Favorite | TC[Scopus]:3 | Submit date:2021/09/20
Background Calibration  Nonlinearity  Pipelined Adc  Split-sar Adc  
A 3.3-GS/s 6-b Fully Dynamic Pipelined ADC With Linearized Dynamic Amplifier Journal article
Zihao Zheng, Lai Wei, Jorge Lagos, Ewout Martens, Yan Zhu, Chi Hang Chan, Jan Craninckx, Rui P. Martins. A 3.3-GS/s 6-b Fully Dynamic Pipelined ADC With Linearized Dynamic Amplifier[J]. IEEE Journal of Solid-State Circuits, 2021.
Authors:  Zihao Zheng;  Lai Wei;  Jorge Lagos;  Ewout Martens;  Yan Zhu; et al.
Favorite | TC[WOS]:8 TC[Scopus]:9  IF:4.6/5.6 | Submit date:2021/09/20
Analog-to-digital Conversion  Calibration  Calibration  Dynamic Amplifier (Da)  Hardware  Linearity  Linearization Technique  Pipeline Processing  Pipelined Analog-to-digital Converter (Adc).  Quantization (Signal)  Signal Resolution  System-on-chip  
A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation Conference paper
Zheng,Zihao, Wei,Lai, Lagos,Jorge, Martens,Ewout, Zhu,Yan, Chan,Chi Hang, Craninckx,Jan, Martins,Rui P.. A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation[C], 2020, 254-256.
Authors:  Zheng,Zihao;  Wei,Lai;  Lagos,Jorge;  Martens,Ewout;  Zhu,Yan; et al.
Favorite | TC[WOS]:11 TC[Scopus]:23 | Submit date:2021/03/04