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An 11b 900 MS/s time-interleaved sub-ranging pipelined-SAR ADC Conference paper
Yan Zhu, Chi-Hang Chan, Seng-Pan U, R.P.Martins. An 11b 900 MS/s time-interleaved sub-ranging pipelined-SAR ADC[C], 2014, 211-214.
Authors:  Yan Zhu;  Chi-Hang Chan;  Seng-Pan U;  R.P.Martins
Favorite | TC[WOS]:12 TC[Scopus]:14 | Submit date：2019/02/11
A continuous-time VCO-assisted VCO-based ΣΔ modulator with 76.6dB SNDR and 10MHz BW Conference paper
Yun Du, Tao He, Yang Jiang, Sai-Weng Sin, Seng-Pan U, R.P.Martins. A continuous-time VCO-assisted VCO-based ΣΔ modulator with 76.6dB SNDR and 10MHz BW[C], 2013, 373-376.
Authors:  Yun Du;  Tao He;  Yang Jiang;  Sai-Weng Sin;  Seng-Pan U; et al.
Favorite | TC[WOS]:0 TC[Scopus]:2 | Submit date：2019/02/11
A 10.4-ENOB 120MS/s SAR ADC with DAC linearity calibration in 90nm CMOS Conference paper
Yan Zhu, Chi-Hang Chan, Seng-Pan U, R.P.Martins. A 10.4-ENOB 120MS/s SAR ADC with DAC linearity calibration in 90nm CMOS[C]:IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA, 2013, 69-72.
Authors:  Yan Zhu;  Chi-Hang Chan;  Seng-Pan U;  R.P.Martins
Favorite | TC[WOS]:15 TC[Scopus]:18 | Submit date：2019/02/11
A 13-bit 60MS/s split pipelined ADC with background gain and mismatch error calibration Conference paper
Li Ding, Wenlan Wu, Sai-Weng Sin, Seng-Pan U, R.P.Martins. A 13-bit 60MS/s split pipelined ADC with background gain and mismatch error calibration[C]:IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA, 2013, 77-80.
Authors:  Li Ding;  Wenlan Wu;  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
Favorite | TC[WOS]:3 TC[Scopus]:3 | Submit date：2019/02/11
A DT 0-2 MASH ΣΔ modulator with VCO-based quantizer for enhanced linearity Conference paper
Tao He, Yun Du, Yang Jiang, Sai-Weng Sin, Seng-Pan U, R.P.Martins. A DT 0-2 MASH ΣΔ modulator with VCO-based quantizer for enhanced linearity[C], 2013, 33-36.
Authors:  Tao He;  Yun Du;  Yang Jiang;  Sai-Weng Sin;  Seng-Pan U; et al.
Favorite | TC[WOS]:3 TC[Scopus]:3 | Submit date：2019/02/11
A robust NTF zero optimization technique for both low and high OSRs sigma-delta modulators Conference paper
Yun Du, Tao He, Yang Jiang, Sai-Weng Sin, Seng-Pan U, R.P.Martins. A robust NTF zero optimization technique for both low and high OSRs sigma-delta modulators[C], 2013, 29-32.
Authors:  Yun Du;  Tao He;  Yang Jiang;  Sai-Weng Sin;  Seng-Pan U; et al.
Favorite | TC[WOS]:4 TC[Scopus]:3 | Submit date：2019/02/11
A background gain-calibration technique for low voltage pipelined ADCs based on nonlinear interpolation Conference paper
Li Ding, Sai-Weng Sin, Seng-Pan U, R.P.Martins. A background gain-calibration technique for low voltage pipelined ADCs based on nonlinear interpolation[C]:IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA, 2013, 665-668.
Authors:  Li Ding;  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
Favorite | TC[WOS]:2 TC[Scopus]:2 | Submit date：2019/02/11
Digital Calibration  Lms Algorithm  Nonlinear Interpolation  Pipelined Adcs  
A 34fJ 10b 500 MS/s partial-interleaving pipelined SAR ADC Conference paper
Yan Zhu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, R.P.Martins. A 34fJ 10b 500 MS/s partial-interleaving pipelined SAR ADC[C], 2012, 90-91.
Authors:  Yan Zhu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
Favorite | TC[Scopus]:34 | Submit date：2019/02/11
A 3.8mW 8b 1GS/s 2b/cycle interleaving SAR ADC with compact DAC structure Conference paper
Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Seng-Pan U, R.P.Martins. A 3.8mW 8b 1GS/s 2b/cycle interleaving SAR ADC with compact DAC structure[C], 2012, 86-87.
Authors:  Chi-Hang Chan;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
Favorite | TC[Scopus]:56 | Submit date：2019/02/11
A Noise-Insensitive Offset Calibration Technique for Time Interleaved SAR ADC Conference paper
Li Ding, Sai-Weng Sin, Seng-Pan U, R.P.Martins. A Noise-Insensitive Offset Calibration Technique for Time Interleaved SAR ADC[C], 2010.
Authors:  Li Ding;  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
Favorite |  | Submit date：2019/03/28
Digital Offset Calibration  Noise Averaging  Time Interleaved Adc