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A 0.25pJ/Comparison, 27.3μV Input Noise Dynamic Comparator Exploiting Stacked Floating Preamplifier with Cross-Coupled Feedback Inverters in 180nm CMOS
Conference paper
Wu, Jiangchao, Hu, Ke, Chen, Xuanlin, Mak, Pui In, Martins, Rui P., Law, Man Kay. A 0.25pJ/Comparison, 27.3μV Input Noise Dynamic Comparator Exploiting Stacked Floating Preamplifier with Cross-Coupled Feedback Inverters in 180nm CMOS[C], NEW YORK, USA:Institute of Electrical and Electronics Engineers Inc., 2024.
Authors:
Wu, Jiangchao
;
Hu, Ke
;
Chen, Xuanlin
;
Mak, Pui In
;
Martins, Rui P.
; et al.
Favorite
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TC[WOS]:
0
TC[Scopus]:
0
|
Submit date:2024/06/05
A 0.013mm2 3.2ns Input Range 10-bit Cyclic Time-to-Digital Converter Using Gated Ring Oscillator With Phase Domain Reset in 65nm CMOS
Journal article
Lu, Xin, Wu, Jiangchao, Wang, Zhao, Xiang, Yifei, Liu, Liyuan, Mak, Pui In, Martins, Rui P., Law, Man Kay. A 0.013mm2 3.2ns Input Range 10-bit Cyclic Time-to-Digital Converter Using Gated Ring Oscillator With Phase Domain Reset in 65nm CMOS[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2024, 71(8), 3635 - 3639.
Authors:
Lu, Xin
;
Wu, Jiangchao
;
Wang, Zhao
;
Xiang, Yifei
;
Liu, Liyuan
; et al.
Favorite
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TC[WOS]:
2
TC[Scopus]:
2
IF:
4.0
/
3.7
|
Submit date:2024/05/16
Coarse-fine Conversion
Cyclic Time-to-digital Converter (Tdc)
Delays
Gated-ring Oscillator (Gro)
Generators
Image Edge Detection
Logic Gates
Phase Domain Reset
Ring Oscillators
Signal Resolution
Switches
High Linearity BJT-Based Time-Domain CMOS Temperature Sensor
Conference paper
Yu Lei, Qishen Fang, Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui P. Martins. High Linearity BJT-Based Time-Domain CMOS Temperature Sensor[C], 2023.
Authors:
Yu Lei
;
Qishen Fang
;
Jiangchao Wu
;
Man-Kay Law
;
Pui-In Mak
; et al.
Favorite
|
|
Submit date:2023/02/20
A 93.4% Peak Efficiency CLOAD-Free Multi-Phase Switched-Capacitor DC–DC Converter Achieving a Fast DVS up to 222.5 mV/ns
Journal article
Li, Feiyu, Fang, Qishen, Wu, Jiangchao, Jiang, Yang, Mak, Pui In, Martins, Rui P., Law, Man Kay. A 93.4% Peak Efficiency CLOAD-Free Multi-Phase Switched-Capacitor DC–DC Converter Achieving a Fast DVS up to 222.5 mV/ns[J]. IEEE Journal of Solid-State Circuits, 2023, 59(6), 1747-1758.
Authors:
Li, Feiyu
;
Fang, Qishen
;
Wu, Jiangchao
;
Jiang, Yang
;
Mak, Pui In
; et al.
Favorite
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TC[WOS]:
0
TC[Scopus]:
0
IF:
4.6
/
5.6
|
Submit date:2024/02/22
Capacitors
Delays
Dynamic Voltage Scaling (Dvs)
Multi-phase
Power System Dynamics
Switched-capacitor (Sc) Dc–dc Converter
Switches
System-on-chip
Video Recording
Voltage Control
Voltage Conversion Ratio (Vcr)
Erratum: A Multimode CMOS Vision Sensor With On-Chip Motion Direction Detection and Simultaneous Energy Harvesting Capabilities (IEEE Sensors J. (2022) 22:13 (12808–12819) DOI: 10.1109/JSEN.2022.3179394)
Journal article
Wu, Jiangchao, Lu, Xin, Law, Man Kay, Jiang, Yang, Liu, Liyuan, Mak, Pui In, Martins, Rui P.. Erratum: A Multimode CMOS Vision Sensor With On-Chip Motion Direction Detection and Simultaneous Energy Harvesting Capabilities (IEEE Sensors J. (2022) 22:13 (12808–12819) DOI: 10.1109/JSEN.2022.3179394)[J]. IEEE Sensors Journal, 2022, 22(17).
Authors:
Wu, Jiangchao
;
Lu, Xin
;
Law, Man Kay
;
Jiang, Yang
;
Liu, Liyuan
; et al.
Favorite
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TC[WOS]:
3
TC[Scopus]:
0
IF:
4.3
/
4.2
|
Submit date:2023/01/30
A Multimode CMOS Vision Sensor With On-Chip Motion Direction Detection and Simultaneous Energy Harvesting Capabilities
Journal article
Wu, Jiangchao, Lu, Xin, Law, Man-Kay, Jiang, Yang, Liu, Liyuan, Mak, Pui-In, Martins, Rui P.. A Multimode CMOS Vision Sensor With On-Chip Motion Direction Detection and Simultaneous Energy Harvesting Capabilities[J]. IEEE Sensors Journal, 2022, 22(13), 12808 - 12819.
Authors:
Wu, Jiangchao
;
Lu, Xin
;
Law, Man-Kay
;
Jiang, Yang
;
Liu, Liyuan
; et al.
Favorite
|
TC[WOS]:
3
TC[Scopus]:
3
IF:
4.3
/
4.2
|
Submit date:2022/08/21
Cmos Image Sensor
Energy Harvesting
Motion Direction Detection
Frame Difference
Multi-function
Optical Flow
A Fully-Integrated 10-V Pulse Driver Using Multi-Band Pulse-Frequency Modulation in 65-nm CMOS
Journal article
Wu, Jiangchao, Leong, Hou-Man, Jiang, Yang, Law, Man-Kay, Mak, Pui-In, Martins, Rui P.. A Fully-Integrated 10-V Pulse Driver Using Multi-Band Pulse-Frequency Modulation in 65-nm CMOS[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021, 29(9), 1665 - 1669.
Authors:
Wu, Jiangchao
;
Leong, Hou-Man
;
Jiang, Yang
;
Law, Man-Kay
;
Mak, Pui-In
; et al.
Favorite
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TC[WOS]:
0
TC[Scopus]:
0
IF:
2.8
/
2.8
|
Submit date:2022/08/20
Driver
Fast Transition
Fully Integrated
High-voltage (Hv)
Pulse-frequency Modulation (Pfm)
Low Complexity Illumination-Invariant Motion Vector Detection Based on Logarithmic Edge Detection and Edge Difference
Conference paper
Chuanqi Wei, Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui P. Martins. Low Complexity Illumination-Invariant Motion Vector Detection Based on Logarithmic Edge Detection and Edge Difference[C], IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE, 2020, 9180935.
Authors:
Chuanqi Wei
;
Jiangchao Wu
;
Man-Kay Law
;
Pui-In Mak
;
Rui P. Martins
Favorite
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TC[WOS]:
0
TC[Scopus]:
2
|
Submit date:2022/01/25
Motion Vector Detection
Logarithmic Edge Detection
Frame Difference
Edge Difference
Illumination Invariant
Fully Integrated High Voltage Pulse Driver Using Switched-Capacitor Voltage Multiplier and Synchronous Charge Compensation in 65-nm CMOS
Journal article
Wu,Jiangchao, Lei,Ka Chon, Leong,Hou Man, Jiang,Yang, Law,Man Kay, Mak,Pui In, Martins,Rui P.. Fully Integrated High Voltage Pulse Driver Using Switched-Capacitor Voltage Multiplier and Synchronous Charge Compensation in 65-nm CMOS[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2019, 66(10), 1768-1772.
Authors:
Wu,Jiangchao
;
Lei,Ka Chon
;
Leong,Hou Man
;
Jiang,Yang
;
Law,Man Kay
; et al.
Favorite
|
TC[WOS]:
9
TC[Scopus]:
9
IF:
4.0
/
3.7
|
Submit date:2021/03/09
Charge Compensation
Driver
Fully Integrated
High-voltage
Square Wave
Switched-capacitor
Voltage Multiplier
A 2-μW 45-nV/√Hz Readout Front End with Multiple-Chopping Active-High-Pass Ripple Reduction Loop and Pseudofeedback DC Servo Loop
Journal article
Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui P. Martins. A 2-μW 45-nV/√Hz Readout Front End with Multiple-Chopping Active-High-Pass Ripple Reduction Loop and Pseudofeedback DC Servo Loop[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2016, 63(4), 351-355.
Authors:
Jiangchao Wu
;
Man-Kay Law
;
Pui-In Mak
;
Rui P. Martins
Favorite
|
TC[WOS]:
41
TC[Scopus]:
46
|
Submit date:2019/02/11
Capacitively Coupled Instrumentation Amplifier (Ccia)
Dc Servo Loop (Dsl)
Multiple Chopping
Neural Recording Front End
Pseudofeedback Amplifier
Ripple Reduction Loop (Rrl)