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A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier
Journal article
Jiang,Wenning, Chen,Chixiao, Liu,Qi, Liu,Ming, Zhu,Yan, Chan,Chi Hang, Xu,Hao, Martins,Rui P.. A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier[J]. IEEE Journal of Solid-State Circuits, 2023, 58(10), 2709 - 2721.
Authors:
Jiang,Wenning
;
Chen,Chixiao
;
Liu,Qi
;
Liu,Ming
;
Zhu,Yan
; et al.
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Submit date：2023/08/03
Adaptive Bias
Analog-to-digital Converter (Adc)
Floating Inverter Amplifier (Fia)
Pipelined-successive-approximation-register (Sar) Adc
Reference Ripple Cancellation (Rrc)
Reference Ripple Neutralization (Rrn)
