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Design Trends and Perspectives of Digital Low Dropout Voltage Regulators for Low Voltage Mobile Applications: A Review Journal article
Lai, Li Fang, Ramiah, Harikrishnan, Tan, Yee Chyan, Lai, Nai Shyan, Lim, Chee Cheow, Chen, Yong, Mak, Pui In, Martins, Rui P.. Design Trends and Perspectives of Digital Low Dropout Voltage Regulators for Low Voltage Mobile Applications: A Review[J]. IEEE Access, 2023, 11, 85237-85258.
Authors:  Lai, Li Fang;  Ramiah, Harikrishnan;  Tan, Yee Chyan;  Lai, Nai Shyan;  Lim, Chee Cheow; et al.
Favorite | TC[WOS]:5 TC[Scopus]:6  IF:3.4/3.7 | Submit date：2024/02/23
Analog-assisted  Asynchronous  Cmos Process  Digital Low-dropout (Dldo) Regulators  Event-driven  Hybrid  Power Management Integrated Circuit (Pmic)  Self-clocked  Synchronous  System-on-chip (Soc)  
A 20 MHz Bandwidth 79 dB SNDR SAR-Assisted Noise-Shaping Pipeline ADC with Gain and Offset Calibrations Journal article
Zhang, Yanbo, Zhang, Jin, Liu, Shubin, Ding, Ruixue, Zhu, Yan, Chan, Chi Hang, Martins, Rui P.. A 20 MHz Bandwidth 79 dB SNDR SAR-Assisted Noise-Shaping Pipeline ADC with Gain and Offset Calibrations[J]. IEEE Journal of Solid-State Circuits, 2022, 57(3), 745-756.
Authors:  Zhang, Yanbo;  Zhang, Jin;  Liu, Shubin;  Ding, Ruixue;  Zhu, Yan; et al.
Favorite | TC[WOS]:7 TC[Scopus]:10  IF:4.6/5.6 | Submit date：2022/03/28
Analog-to-digital Converter (Adc)  Inter-stage Gain And Offset Calibrations  Noise-shaping (Ns)  Split Adc  Successive Approximation Register (Sar)-assisted Pipeline  
A 40-MHz Bandwidth 75-dB SNDR Partial-Interleaving SAR-Assisted Noise-Shaping Pipeline ADC Journal article
Song,Yan, Zhu,Yan, Chan,Chi Hang, Martins,Rui P.. A 40-MHz Bandwidth 75-dB SNDR Partial-Interleaving SAR-Assisted Noise-Shaping Pipeline ADC[J]. IEEE Journal of Solid-State Circuits, 2021, 56(6), 1772-1783.
Authors:  Song,Yan;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui P.
Favorite | TC[WOS]:14 TC[Scopus]:17  IF:4.6/5.6 | Submit date：2021/03/09
Analog-to-digital Converter (Adc)  Noise-shaping (Ns)  Offset Calibration  Successive Approximation Register (Sar)-assisted Pipeline  Time Interleaving  
A 1.7-to-2.7GHz 35-38% PAE Multiband CMOS Power Amplifier Employing a Digitally-Assisted Analog Pre-distorter (DAAPD) Reconfigurable Linearization Technique Journal article
Mariappan, Selvakumar, Rajendran, Jagadheswaran, Chen, Yong, Mak, Pui In, Martins, Rui P.. A 1.7-to-2.7GHz 35-38% PAE Multiband CMOS Power Amplifier Employing a Digitally-Assisted Analog Pre-distorter (DAAPD) Reconfigurable Linearization Technique[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2021, 68(11), 3381-3385.
Authors:  Mariappan, Selvakumar;  Rajendran, Jagadheswaran;  Chen, Yong;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:9 TC[Scopus]:10  IF:4.0/3.7 | Submit date：2021/09/20
Power Amplifier (Pa)  Cmos  Digitally-assisted Analog Predistorter (Daapd)  Back-off Output Power (Pbo)  Adjacent Channel Leakage Ratio (Aclr) And Error Vector Magnitude (Evm)  Power-added Efficiency (Pae)  Long-term Evolution (Lte)  
A Fast Response Digital Low-Dropout Regulator Based on Enhanced Analog Assisted Loop Conference paper
Chen, Ruipeng, Zhou, Shaolin, Wu, Zhaohui, Li, Bin, Huang, Mo. A Fast Response Digital Low-Dropout Regulator Based on Enhanced Analog Assisted Loop[C], 2021, 55-56.
Authors:  Chen, Ruipeng;  Zhou, Shaolin;  Wu, Zhaohui;  Li, Bin;  Huang, Mo
Favorite | TC[Scopus]:3 | Submit date：2021/10/28
Current Buffer (Cb)  Digital Low Drop-out Regulator  Enhanced Analog Assisted (E-aa)  Power Management  Switch Compensated Register (Scr)  
Review of Analog-Assisted-Digital and Digital-Assisted-Analog Low Dropout Regulators Journal article
Huang,Mo, Lu,Yan, Martins,Rui P.. Review of Analog-Assisted-Digital and Digital-Assisted-Analog Low Dropout Regulators[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2021, 68(1), 24-29.
Authors:  Huang,Mo;  Lu,Yan;  Martins,Rui P.
Favorite | TC[WOS]:18 TC[Scopus]:23  IF:4.0/3.7 | Submit date：2021/03/04
Analog-assisted-digital  Digital-assisted-analog  Low Dropout Regulator  Power Supply Rejection  Transient Response  
An NMOS Digital LDO with NAND-Based Analog-Assisted Loop in 28-nm CMOS Journal article
Xiaofei Ma, Yan Lu, Qiang Li, Wing-Hung Ki, Rui P. Martins. An NMOS Digital LDO with NAND-Based Analog-Assisted Loop in 28-nm CMOS[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2020, 67(11), 4041-4052.
Authors:  Xiaofei Ma;  Yan Lu;  Qiang Li;  Wing-Hung Ki;  Rui P. Martins
Favorite | TC[WOS]:22 TC[Scopus]:27  IF:5.2/4.5 | Submit date：2021/03/04
Analog Assisted (Aa)  Coarse/fine Tuning  Digital Control  Digital Low-dropout Regulator (Ldo)  Fully Integrated Voltage Regulator (Fivr)  Limit Cycle Oscillation (Lco)  Nmos Ldo  Nonlinear Control  Output-capacitor-free  
A Temperature-Stabilized Single-Channel 1-GS/s 60-dB SNDR SAR-Assisted Pipelined ADC with Dynamic Gm-R-Based Amplifier Journal article
Jiang,Wenning, Zhu,Yan, Zhang,Minglei, Chan,Chi Hang, Martins,Rui Paulo. A Temperature-Stabilized Single-Channel 1-GS/s 60-dB SNDR SAR-Assisted Pipelined ADC with Dynamic Gm-R-Based Amplifier[J]. IEEE Journal of Solid-State Circuits, 2020, 55(2), 322-332.
Authors:  Jiang,Wenning;  Zhu,Yan;  Zhang,Minglei;  Chan,Chi Hang;  Martins,Rui Paulo
Favorite | TC[WOS]:42 TC[Scopus]:51  IF:4.6/5.6 | Submit date：2021/03/09
Analog-to-digital Converter (Adc)  Gm-r Amplifier  Pipelined-successive Approximation Register (Sar) Adc  Residue Amplifier (Ra)  Sar  Sar-assisted Pipelined Adc  Temperature Compensation  
A 12.5-MHz Bandwidth 77-dB SNDR SAR-Assisted Noise Shaping Pipeline ADC Journal article
Song,Yan, Chan,Chi Hang, Zhu,Yan, Martins,Rui P.. A 12.5-MHz Bandwidth 77-dB SNDR SAR-Assisted Noise Shaping Pipeline ADC[J]. IEEE Journal of Solid-State Circuits, 2019, 55(2), 312-321.
Authors:  Song,Yan;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui P.
Favorite | TC[WOS]:17 TC[Scopus]:20  IF:4.6/5.6 | Submit date：2021/03/09
Alternative Loading Capacitor (Alc)  Analog-to-digital Converter (Adc)  Multiplying Digital-to-analog Converter (Mdac) Reusing  Noise Shaping (Ns)  Successive Approximation Register (Sar)-assisted Pipeline  
An Analog-Assisted Tri-Loop Digital Low-Dropout Regulator Journal article
Huang M., Lu Y., Seng-Pan U., Martins R.P.. An Analog-Assisted Tri-Loop Digital Low-Dropout Regulator[J]. IEEE Journal of Solid-State Circuits, 2018, 53(1), 20-34.
Authors:  Huang M.;  Lu Y.;  Seng-Pan U.;  Martins R.P.
Favorite | TC[WOS]:91 TC[Scopus]:100  IF:4.6/5.6 | Submit date：2019/02/11
Amplifier  Analog Assisted (Aa)  Coarse/fine Tuning  Digital Control  Fully Integrated Voltage Regulator (Fivr)  Limit Cycle Oscillation (Lco)  Low-dropout (Ldo) Regulator  Nonlinear Control  Output-capacitor-free  Power Management