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A 5.99-GHz VCO with Wideband-Differential-Mode Second Harmonic Resonance Achieving - 138.9 dBc/Hz Phase Noise at an Offset of 10 MHz Journal article
Yang, Chaowei, Chen, Yong, Huang, Yunbo, Martins, Rui P., Mak, Pui In. A 5.99-GHz VCO with Wideband-Differential-Mode Second Harmonic Resonance Achieving - 138.9 dBc/Hz Phase Noise at an Offset of 10 MHz[J]. IEEE Microwave and Wireless Technology Letters, 2024, 34(11), 1267-1270.
Authors:  Yang, Chaowei;  Chen, Yong;  Huang, Yunbo;  Martins, Rui P.;  Mak, Pui In
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:0/0 | Submit date：2024/11/05
1/f3 Pn Corner  Cmos  Figure-of-merit (Fom)  Impulse Sensitivity Function (Isf)  Phase Noise (Pn)  Voltage-controlled Oscillator (Vco)  Wideband-harmonic Shaping  
A 167-μW 71.7-dB SFDR 2.4-GHz BLE Receiver Using a Passive Quadrature Front End, a Double-Sided Double-Balanced Cascaded Mixer, and a Dual-Transformer-Coupled Class-D VCO Journal article
Shao, Haijun, Martins, Rui P., Mak, Pui In. A 167-μW 71.7-dB SFDR 2.4-GHz BLE Receiver Using a Passive Quadrature Front End, a Double-Sided Double-Balanced Cascaded Mixer, and a Dual-Transformer-Coupled Class-D VCO[J]. IEEE Journal of Solid-State Circuits, 2024.
Authors:  Shao, Haijun;  Martins, Rui P.;  Mak, Pui In
Favorite | TC[WOS]:0 TC[Scopus]:1  IF:4.6/5.6 | Submit date：2024/11/05
Adjacent Channel  Bluetooth Low Energy (Ble)  Cascaded  Cmos  Double Balanced  Figure Of Merit (Fom)  Hybrid Coupler  Noise Figure (Nf)  Notching  Out Of Band (Oob)  Passive Intensive  Phase Noise (Pn)  Quadrature  Signal-to-noise Ratio (Snr)  Spurious-free Dynamic Range (Sfdr)  Ultra-low-power (Ulp)  Voltage-controlled Oscillator (Vco)  
Exploring the Performance of Hall Sensor with Substrate Bias Modulation in SOI Process Journal article
Cao, Boyang, Lei, Ka Meng, Zou, Hengchen, Martins, Rui P., Mak, Pui In. Exploring the Performance of Hall Sensor with Substrate Bias Modulation in SOI Process[J]. IEEE Sensors Journal, 2024, 24(17), 27365-27372.
Authors:  Cao, Boyang;  Lei, Ka Meng;  Zou, Hengchen;  Martins, Rui P.;  Mak, Pui In
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.3/4.2 | Submit date：2024/08/05
Cmos  Cross Plate  Horizontal Hall Sensor  Substrate-biased  
Area-efficient ultra-wide-tuning-range ring oscillators in 65-nm complementary metal–oxide–semiconductor Journal article
Yang, Chaowei, Chen, Yong, Cheng, Kai, Stefano, Crovetti Paolo, Martins, Rui P., Mak, Pui In. Area-efficient ultra-wide-tuning-range ring oscillators in 65-nm complementary metal–oxide–semiconductor[J]. International Journal of Circuit Theory and Applications, 2024.
Authors:  Yang, Chaowei;  Chen, Yong;  Cheng, Kai;  Stefano, Crovetti Paolo;  Martins, Rui P.; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:1.8/1.7 | Submit date：2024/08/05
Clock And Data Recovery (Cdr)  Cmos Figure-of-merit (Fom)  Figure-of-merit With Tuning And Area (Fomta)  Figure-of-merit With Tuning Range (Fomt)  Flicker (1/f)  Noise Noise Transfer Phase Noise (Pn)  Phase-locked Loop (Pll)  Quality Factor Switched-capacitor Array (Sca)  Thermal Noise Transformer Tuning Range (Tr)  Ultra-wide-tuning-range Voltage-controlled Oscillator (Vco)  
A Fast Startup 38.4-MHz Crystal Oscillator Achieving 99-nJ Startup Energy with Adaptive Chirping Journal article
Rahmani, Abdolraouf, Ramiah, Harikrishnan, Lei, Ka Meng, Lim, Chee Cheow, Lai, Nai Shyan, Mak, Pui In, Martins, Rui P.. A Fast Startup 38.4-MHz Crystal Oscillator Achieving 99-nJ Startup Energy with Adaptive Chirping[J]. IEEE Access, 2024, 12, 102202-102211.
Authors:  Rahmani, Abdolraouf;  Ramiah, Harikrishnan;  Lei, Ka Meng;  Lim, Chee Cheow;  Lai, Nai Shyan; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:3.4/3.7 | Submit date：2024/08/05
Cmos  Internet-of-things (Iot)  Crystal Oscillator (Xo)  Startup Time  Chirp Injection  Motional Current  Adaptive Chirp Injection  Energy Injection  
Monolithic Heterogeneous Integration of Si(100)/GaN CMOS Inverters and Normally-Off GaN Power Devices for High Switching Frequency and High Power Applications Conference paper
Fan, Yutong, Liu, Xi, Zhang, Weihang, Wu, Yinhe, Liu, Zhihong, Zhang, Chunfu, Jiang, Yang, Mak, Pui In, Hao, Yue, Zhang, Jincheng. Monolithic Heterogeneous Integration of Si(100)/GaN CMOS Inverters and Normally-Off GaN Power Devices for High Switching Frequency and High Power Applications[C]:IEEE, 2024, 267-270.
Authors:  Fan, Yutong;  Liu, Xi;  Zhang, Weihang;  Wu, Yinhe;  Liu, Zhihong; et al.
Favorite | TC[WOS]:0 TC[Scopus]:1 | Submit date：2024/08/05
Breakdown Voltage  Cmos  Gan  Inverter  Logic Integrated Circuit  Monolithic Integration  Mosfet  Si  
A Switchless Dual-core Triple-Mode VCO Achieving 7.1-to-15.7 GHz Frequency Tuning Range and 202.1 dBc/Hz Peak FoM at 3.7 Kelvin Conference paper
Yue Wu#,, PENG YATAO, Benhao Huo, Jun Yin, Rui P. Martins, Pui In Mak. A Switchless Dual-core Triple-Mode VCO Achieving 7.1-to-15.7 GHz Frequency Tuning Range and 202.1 dBc/Hz Peak FoM at 3.7 Kelvin[C]:Institute of Electrical and Electronics Engineers Inc., 2024, 243 - 246.
Authors:  Yue Wu#,;  PENG YATAO;  Benhao Huo;  Jun Yin;  Rui P. Martins; et al.
Adobe PDF | Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2024/07/08
Cryogenic Cmos  Frequency Tuning Range  Mode-switching  Quantum Interface  Switch-less  Vco  
A 521pW, 0.016%/V Line Sensitivity Self-Biased CMOS Voltage Reference With DIBL Effect Compensation Using Adaptive VGS Control Journal article
Yu, Kai, Yang, Shangru, Li, Sizhen, Huang, Mo. A 521pW, 0.016%/V Line Sensitivity Self-Biased CMOS Voltage Reference With DIBL Effect Compensation Using Adaptive VGS Control[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2024, 71(4), 1754-1758.
Authors:  Yu, Kai;  Yang, Shangru;  Li, Sizhen;  Huang, Mo
Favorite | TC[WOS]:1 TC[Scopus]:1  IF:4.0/3.7 | Submit date：2024/05/02
Cmos Voltage Reference  Dibl Effect Compensation  Line Sensitivity  Power Supply Rejection Ratio  Self-biased  Ultra-low Power  
Wafer-Scale GaN-Si(100) Monolithic Heterogeneous Integration Inverters With Improved Output Voltage Swing and Fast Switching Capability by Transfer Printing and Self-Aligned Etching Technology Journal article
Fan, Yutong, Zhang, Weihang, Liu, Zhihong, Zhao, Shenglei, Jiang, Yang, Mak, Pui In, Hao, Yue, Zhang, Jincheng. Wafer-Scale GaN-Si(100) Monolithic Heterogeneous Integration Inverters With Improved Output Voltage Swing and Fast Switching Capability by Transfer Printing and Self-Aligned Etching Technology[J]. IEEE Transactions on Electron Devices, 2024.
Authors:  Fan, Yutong;  Zhang, Weihang;  Liu, Zhihong;  Zhao, Shenglei;  Jiang, Yang; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:2.9/2.9 | Submit date：2024/05/16
Cmos  Gallium Nitride (Gan)  Inverter  Monolithic Heterogeneous Integration  Si  Wafer-scale  
A 0.011%/V LS and −76-dB PSRR Self-Biased CMOS Voltage Reference With Quasi Self-Cascode Current Mirror Journal article
Yu, Kai, Chen, Jiyang, Li, Sizhen, Huang, Mo. A 0.011%/V LS and −76-dB PSRR Self-Biased CMOS Voltage Reference With Quasi Self-Cascode Current Mirror[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2024, 71(3), 1052-1056.
Authors:  Yu, Kai;  Chen, Jiyang;  Li, Sizhen;  Huang, Mo
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.0/3.7 | Submit date：2024/02/22
Cmos Voltage Reference  Line Sensitivity  Power Supply Rejection Ratio  Quasi Self-cascode Current Mirror  Self-biased