×
验证码:
换一张
Forgotten Password?
Stay signed in
Login With UMPASS
English
|
繁體
Login With UMPASS
Log In
ALL
ORCID
TI
AU
PY
SU
KW
TY
JN
DA
IN
PB
FP
ST
SM
Study Hall
Image search
Paste the image URL
Home
Faculties & Institutes
Scholars
Publications
Subjects
Statistics
News
Search in the results
Faculties & Institutes
Faculty of Scien... [1]
Authors
RUI PAULO DA SIL... [1]
U SENG PAN [1]
SIN SAI WENG [1]
Document Type
Conference paper [1]
Date Issued
2011 [1]
Language
英語English [1]
Source Publication
IEEE Asia-Pacifi... [1]
Indexed By
CPCI-S [1]
Funding Organization
Funding Project
×
Knowledge Map
UM
Start a Submission
Submissions
Unclaimed
Claimed
Attach Fulltext
Bookmarks
Browse/Search Results:
1-1 of 1
Help
Selected(
0
)
Clear
Items/Page:
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
85
90
95
100
Sort:
Select
Journal Impact Factor Ascending
Journal Impact Factor Descending
Title Ascending
Title Descending
Author Ascending
Author Descending
Issue Date Ascending
Issue Date Descending
WOS Cited Times Ascending
WOS Cited Times Descending
Submit date Ascending
Submit date Descending
A reduced jitter-sensitivity clock generation technique for continuous-time ΣΔ modulators
Conference paper
Jiang Y., Wong K.-F., Cai C.-Y., Sin S.-W., U S.-P., Martins R.P.. A reduced jitter-sensitivity clock generation technique for continuous-time ΣΔ modulators[C], 2011, 1011-1014.
Authors:
Jiang Y.
;
Wong K.-F.
;
Cai C.-Y.
;
Sin S.-W.
;
U S.-P.
; et al.
Favorite
|
TC[WOS]:
2
TC[Scopus]:
2
|
Submit date：2019/02/11
Clock-jitter Sensitivity
Continuous-time
Sigma-delta Modulator
Switched Current Dac
