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An FPGA-Based Transformer Accelerator With Parallel Unstructured Sparsity Handling for Question-Answering Applications Journal article
Cao, Rujian, Zhao, Zhongyu, Un, Ka Fai, Yu, Wei Han, Martins, Rui P., Mak, Pui In. An FPGA-Based Transformer Accelerator With Parallel Unstructured Sparsity Handling for Question-Answering Applications[J]. IEEE Transactions on Circuits and Systems II-Express Briefs, 2024, 71(11), 4688-4692.
Authors:  Cao, Rujian;  Zhao, Zhongyu;  Un, Ka Fai;  Yu, Wei Han;  Martins, Rui P.; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.0/3.7 | Submit date：2024/10/10
Sparse Matrices  Computational Modeling  Transformers  Hardware  Energy Efficiency  Circuits  Throughput  Dataflow  Digital Accelerator  Energy-efficient  Field-programmable Gate Array (Fpga)  Sparsity  Transformer  
Energy-Efficient UAV Scheduling and Probabilistic Task Offloading for Digital Twin-Empowered Consumer Electronics Industry Journal article
Huang, Xumin, Zhang, Yang, Qi, Yuanhang, Huang, Caishi, Hossain, M. Shamim. Energy-Efficient UAV Scheduling and Probabilistic Task Offloading for Digital Twin-Empowered Consumer Electronics Industry[J]. IEEE Transactions on Consumer Electronics, 2024, 70(1), 2145-2154.
Authors:  Huang, Xumin;  Zhang, Yang;  Qi, Yuanhang;  Huang, Caishi;  Hossain, M. Shamim
Favorite | TC[WOS]:0 TC[Scopus]:2  IF:4.3/3.9 | Submit date：2024/05/16
Autonomous Aerial Vehicles  Consumer Electronics  Consumer Electronics Industry  Digital Twin  Energy-efficient Uav Scheduling  Industrial Internet Of Things  Industries  Job Shop Scheduling  Manufacturing Processes  Probabilistic Task Offloading  Task Analysis  Uav  
A Second-Order NS Pipelined SAR ADC with Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator Journal article
Zhang, Hongshuai, Zhu, Yan, Martins, Rui P., Chan, Chi Hang. A Second-Order NS Pipelined SAR ADC with Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator[J]. IEEE Journal of Solid-State Circuits, 2023, 58(12), 3565-3575.
Authors:  Zhang, Hongshuai;  Zhu, Yan;  Martins, Rui P.;  Chan, Chi Hang
Favorite | TC[WOS]:2 TC[Scopus]:4  IF:4.6/5.6 | Submit date：2024/01/02
Analog-to-digital Converter (Adc)  Auxiliary Noise Shaping (Ns) Successive-approximation Register (Sar) Adc  Capacitor Stacking  Data-weighted Averaging And detect-And-skip (Dwa And Das)  Differential Sampling  Energy Efficient  Error SupprEssion (Es) And Reconstruction  Gain Error Shaping (Ges)  Partial Time Interleaving  Passive Ns  Pipelined Sar  Quantization Predication Unrolled  Two-step Floating Inverter Amplifier (Fia)  
An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications Journal article
Zhao, Zhongyu, Cao, Rujian, Un, Ka Fai, Yu, Wei Han, Mak, Pui In, Martins, Rui P.. An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2023, 70(1), 281-285.
Authors:  Zhao, Zhongyu;  Cao, Rujian;  Un, Ka Fai;  Yu, Wei Han;  Mak, Pui In; et al.
Favorite | TC[WOS]:8 TC[Scopus]:12  IF:4.0/3.7 | Submit date：2022/08/08
Transformers  Energy Efficiency  Broadcasting  Convolutional Neural Networks  Integrated Circuit Modeling  Field Programmable Gate Arrays  Random Access Memory  Dataflow  Digital Accelerator  Energy-efficient  Field-programmable Gate Array (Fpga)  Energy Efficiency  Image Recognition  Transformer  
An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Code-Counter-Based Offset Calibration Journal article
Zhang, Hongshuai, Zhu, Yan, Chan, Chi Hang, Martins, Rui P.. An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Code-Counter-Based Offset Calibration[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2022, 57(5), 1480-1491.
Authors:  Zhang, Hongshuai;  Zhu, Yan;  Chan, Chi Hang;  Martins, Rui P.
Favorite | TC[WOS]:8 TC[Scopus]:10  IF:4.6/5.6 | Submit date：2022/05/13
Amplifier Linearity Enhancement  Analog-to-digital Converter (Adc)  Background Offset Calibration  Digital Reconstruction Filter  Dwa  Energy And Area Efficient  Inherent Gain Error Tolerant  Inter-stage Gain Error  Noise Shaping (Ns)  Oversampling  Partial Interleaving  Pipelined Successive Approximation (Sar)  Quantization Leakage Error  
A 10-Bit 200-kS/s 1.76-μW SAR ADC with Hybrid CAP-MOS DAC for Energy-Limited Applications Journal article
Zhang, Hongshuai, Zhang, Hong, Song, Yan, Zhang, Ruizhi. A 10-Bit 200-kS/s 1.76-μW SAR ADC with Hybrid CAP-MOS DAC for Energy-Limited Applications[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2019, 66(5), 1716-1727.
Authors:  Zhang, Hongshuai;  Zhang, Hong;  Song, Yan;  Zhang, Ruizhi
Favorite | TC[WOS]:16 TC[Scopus]:15  IF:5.2/4.5 | Submit date：2022/04/15
Analog To Digital Converter  Area Efficient  Cap-mos  Energy Efficient  Hybrid  Low Voltage  Mismatch  Noise  Successive Approximation Register  
A Fully Integrated Digital LDO With Coarse-Fine-Tuning and Burst-Mode Operation Journal article
Huang M., Lu Y., Sin S.-W., Seng-Pan U., Martins R.P.. A Fully Integrated Digital LDO With Coarse-Fine-Tuning and Burst-Mode Operation[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2016, 63(7), 683-687.
Authors:  Huang M.;  Lu Y.;  Sin S.-W.;  Seng-Pan U.;  Martins R.P.
Favorite | TC[WOS]:113 TC[Scopus]:131  IF:4.0/3.7 | Submit date：2019/02/11
Burst Mode  Coarse-fine-tuning (Cft)  Digital Control  Dynamic Voltage Scaling (Dvs)  Energy-efficient Digital  Fast Transient  Low Dropout Regulator (Ldo)  
A Fully Integrated Digital LDO With Coarse–Fine-Tuning and Burst-Mode Operation Journal article
Huang, M., Lu, Y., Sin, S. W., U, S.P., Martins, R. P.. A Fully Integrated Digital LDO With Coarse–Fine-Tuning and Burst-Mode Operation[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2016, 683-687.
Authors:  Huang, M.;  Lu, Y.;  Sin, S. W.;  U, S.P.;  Martins, R. P.
Favorite | TC[WOS]:113 TC[Scopus]:132  IF:4.0/3.7 | Submit date：2022/01/25
Burst Mode  Coarse–fine-tuning (Cft)  Digital Control  Dynamic Voltage Scaling (Dvs)  Energy-efficient Digital  Fast Transient  Low Dropout Regulator (Ldo)