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Adaptive spectrum amplitude modulation method for rolling bearing fault frequency determination Journal article
Tu, Zhaoyu, Luo, Zeyu, Li, Menghui, Wang, Jun, Yang, Zhi Xin, Wang, Xianbo. Adaptive spectrum amplitude modulation method for rolling bearing fault frequency determination[J]. Measurement Science and Technology, 2024, 35(11), 116108.
Authors:  Tu, Zhaoyu;  Luo, Zeyu;  Li, Menghui;  Wang, Jun;  Yang, Zhi Xin; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:2.7/2.4 | Submit date：2024/09/03
Adaptive Filter  Fault Frequency Determination  Magnitude Order  Sparse Stacked Autoencoder  Spectral Amplitude Modulation  
An FLL Providing Real-Time Frequency Calibration for OOK Power Oscillator Transmitters Journal article
Yadong Yin, Zehui Zhang, Weiming Xiao, Ximing Fu, Kamal El-Sankary, Sio-Hang Pun. An FLL Providing Real-Time Frequency Calibration for OOK Power Oscillator Transmitters[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2023, 70(9), 3233-3237.
Authors:  Yadong Yin;  Zehui Zhang;  Weiming Xiao;  Ximing Fu;  Kamal El-Sankary; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.0/3.7 | Submit date：2023/08/03
Frequency-locked Loop (Fll)  Ook Modulation  Power Oscillator Transmitter  Pulse-width Detection  Time Register  
An Analog Multiplier Controlled Buck-Boost Converter Journal article
Wen, Sibo, Zeng, Wen Liang, Lam, Chi Seng, Maloberti, Franco, Martins, Rui Paulo. An Analog Multiplier Controlled Buck-Boost Converter[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 69(10), 4173-4177.
Authors:  ; et al.
Favorite | TC[WOS]:4 TC[Scopus]:4  IF:4.0/3.7 | Submit date：2022/08/05
Analog Multiplier  Boost Mode  Buck Mode  Buck-boost Converter  Lithium Batteries  Logic Circuits  Pulse Width Modulation  Regulation  Switches  Switching Frequency  Switching Loss  
An FPGA-Based Energy-Efficient Reconfigurable Depthwise Separable Convolution Accelerator for Image Recognition Journal article
Lei Xuan, Ka-Fai Un, Chi-Seng Lam, Rui P. Martins. An FPGA-Based Energy-Efficient Reconfigurable Depthwise Separable Convolution Accelerator for Image Recognition[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2022, 69(10), 4003-4007.
Authors:  Lei Xuan;  Ka-Fai Un;  Chi-Seng Lam;  Rui P. Martins
Favorite | TC[WOS]:26 TC[Scopus]:26  IF:4.0/3.7 | Submit date：2022/06/14
Frequency Modulation  Field Programmable Gate Arrays  Energy Efficiency  Memory Management  Random Access Memory  Arrays  Computational Cost  Convolutional Neural Network (Cnn)  Field-programmable Gate Array (Fpga)  Mobilenetv2  Neural Network  Quantization  
Miniaturization of a Nuclear Magnetic Resonance System: Architecture and Design Considerations of Transceiver Integrated Circuits Journal article
Fan, Shuhao, Zhou, Qi, Lei, Ka Meng, Mak, Pui In, Martins, Rui P.. Miniaturization of a Nuclear Magnetic Resonance System: Architecture and Design Considerations of Transceiver Integrated Circuits[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2022, 69(8), 3049-3060.
Authors:  Fan, Shuhao;  Zhou, Qi;  Lei, Ka Meng;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:7 TC[Scopus]:8  IF:5.2/4.5 | Submit date：2022/08/05
Cmos  Frequency Stability  Integrated Circuits  Magnetic Resonance Imaging  Magnetization  Multi-Amplitude Modulation (Am)  Multi-phase Modulation (Pm)  Nmr-on-a-chip  Nuclear Magnetic Resonance  Nuclear Magnetic Resonance (Nmr)  Phase Noise  Radio Frequency  Receiver (Rx)  Rx Linearity  Rx Noise  Signal To Noise Ratio  Superconducting Magnets  Transceiver (Trx)  Transmitter (Tx)  Tx Output Power  
A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR with a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS Journal article
Xiaoteng Zhao, Yong Chen, Lin Wang, Pui In Mak, Franco Maloberti, Rui P. Martins. A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR with a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS[J]. IEEE Journal of Solid-State Circuits, 2022, 57(5), 1358-1371.
Authors:  Xiaoteng Zhao;  Yong Chen;  Lin Wang;  Pui In Mak;  Franco Maloberti; et al.
Favorite | TC[WOS]:10 TC[Scopus]:14  IF:4.6/5.6 | Submit date：2022/05/13
And Zero Net Current (Znc)  Bang-bang Clock And Data Recovery (Bbcdr)  Charge Pump (Cp)  Cmos  Four-level Pulse-amplitude Modulation (Pam)  Frequency Detector (Fd)  Half-rate  Negative Net Current (Nnc)  Positive Net Current (Pnc)  Reference-less  
A Single-Opamp Third Order CT Δ Σ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp Journal article
Xing, Kai, Wang, Wei, Zhu, Yan, Chan, Chi Hang, Martins, Rui P.. A Single-Opamp Third Order CT Δ Σ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2022, 69(1), 64-74.
Authors:  Xing, Kai;  Wang, Wei;  Zhu, Yan;  Chan, Chi Hang;  Martins, Rui P.
Favorite | TC[WOS]:5 TC[Scopus]:5  IF:5.2/4.5 | Submit date：2021/09/20
Analog-to-digital Conversion (Adc)  Continuous-time Delta-sigma Modulator (Ctdsm)  Gain  High-speed Noise-shaping Sar (ns-Sar).  Loading  Low-frequency Noise  Modulation  Preliminary Sampling And Quantization (Psq) Technique  Quantization (Signal)  Sab-eld-merged Integrator  Three-stage Opamp  Topology  Wideband  
Adaptive Fourier Decomposition for Multi-Channel Signal Analysis Journal article
Wang Ze, Wong Chi Man, Agostinho Rosa, Qian Tao, Wan F(萬峰). Adaptive Fourier Decomposition for Multi-Channel Signal Analysis[J]. IEEE Transactions on Signal Processing, 2022, 70, 903-918.
Authors:  Wang Ze;  Wong Chi Man;  Agostinho Rosa;  Qian Tao;  Wan F(萬峰)
Adobe PDF | Favorite | TC[WOS]:12 TC[Scopus]:6  IF:4.6/5.2 | Submit date：2022/08/28
Time-frequency Analysis  Oscillators  Convergence  Wavelet Transforms  Adaptation Models  Frequency Modulation  Chirp  Amplitude And Frequency Modulated Signal  Adaptive Fourier Decomposition  Multi-channel Signal  Time-frequency Analysis  
A 0.0285-mm² 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS Journal article
Zhao, Xiaoteng, Chen, Yong, Mak, Pui In, Martins, Rui P.. A 0.0285-mm² 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2021, 57(2), 546-561.
Authors:  ; et al.
Favorite | TC[WOS]:13 TC[Scopus]:13  IF:4.6/5.6 | Submit date：2021/10/28
Acquisition Speed  Bang-bang Clock And Data Recovery (Bbcdr)  Charge Pump (Cp)  Clocks  Cmos  Detectors  Four-level Pulse Amplitude Modulation (Pam-4)  Frequency Detector (Fd)  Frequency Modulation  Hybrid Control Circuit (Hcc)  Jitter  Jitter Tolerance (Jtol)  Jitter Transfer Function (Jtf)  Logic Gates  Phase Detector (Pd)  Strobe Point (Sp).  Switches  Voltage-controlled Oscillators  
A Fully-Integrated 10-V Pulse Driver Using Multi-Band Pulse-Frequency Modulation in 65-nm CMOS Journal article
Wu, Jiangchao, Leong, Hou-Man, Jiang, Yang, Law, Man-Kay, Mak, Pui-In, Martins, Rui P.. A Fully-Integrated 10-V Pulse Driver Using Multi-Band Pulse-Frequency Modulation in 65-nm CMOS[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021, 29(9), 1665 - 1669.
Authors:  Wu, Jiangchao;  Leong, Hou-Man;  Jiang, Yang;  Law, Man-Kay;  Mak, Pui-In; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:2.8/2.8 | Submit date：2022/08/20
Driver  Fast Transition  Fully Integrated  High-voltage (Hv)  Pulse-frequency Modulation (Pfm)