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A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase Alignment Journal article
Li, Haoran, Xu, Tailong, Meng, Xi, Yin, Jun, Martins, Rui P., Mak, Pui In. A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase Alignment[J]. IEEE Journal of Solid-State Circuits, 2024.
Authors:  Li, Haoran;  Xu, Tailong;  Meng, Xi;  Yin, Jun;  Martins, Rui P.; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.6/5.6 | Submit date：2024/10/10
Fast Locking  Frequency Synthesis  Frequency-locked Loop (Fll)  Low Jitter  Millimeter-wave (Mm-wave)  Phase-locked Loop (Pll)  Reference (Ref.) Spur  Sub-sampling Phase Detector (Sspd)  Voltage-controlled Oscillator (Vco)  
A Battery-Free Crystal-Less BLE Transmitter Tag With Fully-Integrated RF Harvesting and Multitag TDD and FDD Broadcasting Journal article
Lin, Liwen, Yu, Wei Han, Shao, Haijun, Yin, Jun, Lei, Ka Meng, Martins, Rui P., Mak, Pui In. A Battery-Free Crystal-Less BLE Transmitter Tag With Fully-Integrated RF Harvesting and Multitag TDD and FDD Broadcasting[J]. IEEE Transactions on Microwave Theory and Techniques, 2024.
Authors:  Lin, Liwen;  Yu, Wei Han;  Shao, Haijun;  Yin, Jun;  Lei, Ka Meng; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.1/4.2 | Submit date：2024/10/10
Battery  Bluetooth Low Energy (Ble)  Crystal (Xtal)  Frequency Retaining Technique  Frequency-division Duplex (Fdd)  Over-the-air (Ota)  Rf Reference Phase-locked Loop (Pll)  Time-division Duplex (Tdd)  Trifilar Rf Harvester  Vdd-insensitive Voltage Control Oscillator And Power Amplifier (Vco-pa)  
A 6-GHz 78-fsRMS Double-Sampling PLL With Low-Ripple Bootstrapped DSPD and Retimer-Less MMD Achieving −92-dBc Reference Spur and −258-dB FOM Journal article
Ren, Hongyu, Yang, Zunsong, Huang, Yunbo, Feng, Chaoping, Chen, Tianle, Zhang, Xinming, Meng, Xianghe, Yan, Weiwei, Zhang, Weidong, Iizuka, Tetsuya, Chen, Yong, Mak, Pui In, Han, Zhengsheng, Li, Bo. A 6-GHz 78-fsRMS Double-Sampling PLL With Low-Ripple Bootstrapped DSPD and Retimer-Less MMD Achieving −92-dBc Reference Spur and −258-dB FOM[J]. IEEE Microwave and Wireless Technology Letters, 2024, 34(5), 548-551.
Authors:  Ren, Hongyu;  Yang, Zunsong;  Huang, Yunbo;  Feng, Chaoping;  Chen, Tianle; et al.
Favorite | TC[WOS]:0 TC[Scopus]:2  IF:0/0 | Submit date：2024/05/16
Double Sampling (Ds)  Figure Of Merit (Fom)  Frequency Synthesizer  Low Jitter  Low Spur  Phase Detector (Pd)  Phase-locked Loop (Pll)  Phase Noise (Pn)  Reference Sampling (Rs)  Subsampling (Ss)  Phase Locked Loops  Type-i  
A 21.8-41.6-GHz Low Jitter and High FoMj Fast-Locking Subsampling PLL With Dead Zone Automatic Controller Journal article
Chen, Wen, Shu, Yiyang, Yin, Jun, Mak, Pui In, Gao, Xiang, Luo, Xun. A 21.8-41.6-GHz Low Jitter and High FoMj Fast-Locking Subsampling PLL With Dead Zone Automatic Controller[J]. IEEE Transactions on Microwave Theory and Techniques, 2024.
Authors:  Chen, Wen;  Shu, Yiyang;  Yin, Jun;  Mak, Pui In;  Gao, Xiang; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.1/4.2 | Submit date：2024/05/16
Detectors  Fast Locking  Frequency Locked Loops  Jitter  Jitter  Millimeter Wave (mm-Wave)  Phase Locked Loops  Phase Noise  Subsampling Phase-locked Loop (Sspll)  Voltage-controlled Oscillators  Wideband  Wideband  
A 28 nm 368 fJ/cycle, 0.43%/V Supply Sensitivity, FLL based RC Oscillator Featuring Positive TC Only Resistors and ΣM Based Trimming Journal article
Huang,Yunbo, Chen,Yong, Yang,Kaiyuan, Crovetti,Paolo, Mak,Pui In, Martins,Rui P.. A 28 nm 368 fJ/cycle, 0.43%/V Supply Sensitivity, FLL based RC Oscillator Featuring Positive TC Only Resistors and ΣM Based Trimming[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2023, 70(11), 3950-3954.
Authors:  Huang,Yunbo;  Chen,Yong;  Yang,Kaiyuan;  Crovetti,Paolo;  Mak,Pui In; et al.
Favorite | TC[WOS]:2 TC[Scopus]:2  IF:4.0/3.7 | Submit date：2023/08/03
Clocks  Cmos  Delta-sigma-modulator  Energy Efficiency  Frequency Inaccuracy  Frequency-locked-loop (Fll)  Generators  Oscillators  Rc Oscillator  Resistance  Resistors  Switched-capacitor Resistor  Switches  Temperature Coefficients  Voltage-controlled Oscillators  
A 0.4-V 0.0294-mm2 Resistor-Based Temperature Sensor Achieving ±0.24 °C p2p Inaccuracy From40 °C to 125 °C and 385 fJ · K2 Resolution FoM in 65-nm CMOS Journal article
Dan Shi, Ka-Meng Lei, Rui P. Martins, Pui-In Mak. A 0.4-V 0.0294-mm2 Resistor-Based Temperature Sensor Achieving ±0.24 °C p2p Inaccuracy From40 °C to 125 °C and 385 fJ · K2 Resolution FoM in 65-nm CMOS[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2023, 58(9), 2543-2553.
Authors:  Dan Shi;  Ka-Meng Lei;  Rui P. Martins;  Pui-In Mak
Favorite | TC[WOS]:3 TC[Scopus]:5  IF:4.6/5.6 | Submit date：2023/08/03
Digital-intensive Frequency-locked-loop (Dfll)  Internet-of-things (Iot)  Low Power  Resistor-based Temperature Sensor  Ultralow-voltage (Ulv)  
Ring-VCO-based Phase-Locked Loops for Clock Generation – Design Considerations and State-of-the-Art Journal article
Shiheng Yang, Jun Yin, Yueduo Liu, Rongxin Bao, Zihao Zhu, Jiahui Lin, Qiang Li, Pui-In Mak, Rui P. Martins. Ring-VCO-based Phase-Locked Loops for Clock Generation – Design Considerations and State-of-the-Art[J]. Chip, 2023, 2(2), 1-10.
Authors:  Shiheng Yang;  Jun Yin;  Yueduo Liu;  Rongxin Bao;  Zihao Zhu; et al.
Favorite | TC[WOS]:1 TC[Scopus]:3 | Submit date：2023/08/19
Clock Generation, Ic Design, Phase-locked Loop (Pll), Frequency Synthesizer  
An FLL Providing Real-Time Frequency Calibration for OOK Power Oscillator Transmitters Journal article
Yadong Yin, Zehui Zhang, Weiming Xiao, Ximing Fu, Kamal El-Sankary, Sio-Hang Pun. An FLL Providing Real-Time Frequency Calibration for OOK Power Oscillator Transmitters[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2023, 70(9), 3233-3237.
Authors:  Yadong Yin;  Zehui Zhang;  Weiming Xiao;  Ximing Fu;  Kamal El-Sankary; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.0/3.7 | Submit date：2023/08/03
Frequency-locked Loop (Fll)  Ook Modulation  Power Oscillator Transmitter  Pulse-width Detection  Time Register  
A Half-Tangent Phase-Locked Loop for Variable-Frequency Grids of More Electric Aircraft Journal article
Guangqi Li, Zhiyong Dai, Bingxuan Wu, Yongheng Yang, Jin Huang, Chi Seng Lam. A Half-Tangent Phase-Locked Loop for Variable-Frequency Grids of More Electric Aircraft[J]. IEEE Transactions on Industrial Electronics, 2023, 70(2), 1576-1585.
Authors:  Guangqi Li;  Zhiyong Dai;  Bingxuan Wu;  Yongheng Yang;  Jin Huang; et al.
Favorite | TC[WOS]:5 TC[Scopus]:5  IF:7.5/8.0 | Submit date：2022/05/17
Half-tangent Phase-locked Loop (Htan-pll)  Large-signal Model  Phase Portrait  Varying-frequency Grid  
Fully-Integrated Timers for Ultra-Low-Power Internet-of-Things Nodes - Fundamentals and Design Techniques Review article
2022
Authors:  Loo, Mikki How Wen;  Ramiah, Harikrishnan;  Lei, Ka Meng;  Lim, Chee Cheow;  Lai, Nai Shyan; et al.
Favorite | TC[WOS]:6 TC[Scopus]:8  IF:3.4/3.7 | Submit date：2022/09/09
Allan Deviation  Cmos  Figure-of-merit (Fom)  Frequency-locked-loop (Fll)  Internet-of-things (Iot)  Jitter  Phase Noise  Relaxation Oscillator (Rxo)  Ultra-low-power  Wakeup Timers