×
验证码:
换一张
Forgotten Password?
Stay signed in
Login With UMPASS
English
|
繁體
Login With UMPASS
Log In
ALL
ORCID
TI
AU
PY
SU
KW
TY
JN
DA
IN
PB
FP
ST
SM
Study Hall
Image search
Paste the image URL
Home
Faculties & Institutes
Scholars
Publications
Subjects
Statistics
News
Search in the results
Faculties & Institutes
Faculty of Scien... [4]
INSTITUTE OF MIC... [3]
THE STATE KEY LA... [2]
Authors
RUI PAULO DA SIL... [4]
MAK PUI IN [2]
LAW MAN KAY [2]
U SENG PAN [1]
SIN SAI WENG [1]
VAI MANG I [1]
More...
Document Type
Journal article [3]
Book [1]
Date Issued
2015 [1]
2013 [1]
2008 [1]
2006 [1]
Language
英語English [2]
Source Publication
IEEE Journal of ... [1]
IEEE Transaction... [1]
IEEE Transaction... [1]
Indexed By
SCIE [3]
CPCI-S [1]
Funding Organization
Funding Project
×
Knowledge Map
UM
Start a Submission
Submissions
Unclaimed
Claimed
Attach Fulltext
Bookmarks
Browse/Search Results:
1-4 of 4
Help
Selected(
0
)
Clear
Items/Page:
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
85
90
95
100
Sort:
Select
Issue Date Ascending
Issue Date Descending
Title Ascending
Title Descending
Author Ascending
Author Descending
WOS Cited Times Ascending
WOS Cited Times Descending
Submit date Ascending
Submit date Descending
Journal Impact Factor Ascending
Journal Impact Factor Descending
Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier with Enhancements of DC Gain, GBW and Slew Rate
Journal article
Zushu Yan, Pui-In Mak, Man-Kay Law, Rui P. Martins, Franco Maloberti. Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier with Enhancements of DC Gain, GBW and Slew Rate[J]. IEEE Journal of Solid-State Circuits, 2015, 50(10), 2353-2366.
Authors:
Zushu Yan
;
Pui-In Mak
;
Man-Kay Law
;
Rui P. Martins
;
Franco Maloberti
Favorite
|
TC[WOS]:
61
TC[Scopus]:
67
|
Submit date:2019/02/11
Area Efficiency
Cmos
Current Mirror
Dc Gain
Differential-pair (Dp) Amplifier
Frequency Compensation
Gain-bandwidth Product (Gbw)
Low Temperature Polysilicon Lcd
Multi-stage Amplifier
Nested Current Mirror
Rail-to-rail Output Swing
Single-stage Amplifier
Slew Rate (Sr)
Stability
15-nW biopotential LPFs in 0.35-μm CMOS using subthreshold-source- follower Biquads with and without gain compensation
Journal article
Tan-Tan Zhang, Pui-In Mak, Mang-I Vai, Peng-Un Mak, Man-Kay Law, Sio-Hang Pun, Feng Wan, Rui P. Martins. 15-nW biopotential LPFs in 0.35-μm CMOS using subthreshold-source- follower Biquads with and without gain compensation[J]. IEEE Transactions on Biomedical Circuits and Systems, 2013, 7(5), 690-702.
Authors:
Tan-Tan Zhang
;
Pui-In Mak
;
Mang-I Vai
;
Peng-Un Mak
;
Man-Kay Law
; et al.
Favorite
|
TC[WOS]:
53
TC[Scopus]:
70
IF:
3.8
/
4.8
|
Submit date:2018/12/24
Biomedical
Biopotential
Body Effect
Cmos
Gain Compensation
Harmonic Distortion
Lowpass Filter
Mosfet
Source Follower
Subthreshold
Time Constant
Transconductor
Generalized circuit techniques for low-voltage high-speed reset- and switched-opamps
Journal article
Sai-Weng Sin, Seng-Pan U, R. P. Martins. Generalized circuit techniques for low-voltage high-speed reset- and switched-opamps[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2008, 55(8), 2188-2201.
Authors:
Sai-Weng Sin
;
Seng-Pan U
;
R. P. Martins
Favorite
|
TC[WOS]:
3
TC[Scopus]:
4
IF:
5.2
/
4.5
|
Submit date:2019/02/11
Common-mode Feedback (Cmfb)
Finite-gain Compensation (Fgc)
Low Voltage (Lv)
Reset-opamp (Ro)
Switched-capacitor (Sc) Circuits
Switched-opamp (So)
Design of Very High-Frequency Multirate Switched-Capacitor Circuits – Extending the Boundaries Of CMOS Analog Front-End Filtering
Book
U Seng Pan, Martins Rui Paulo, Epifanio da Franca Jose de Albuquerque. Design of Very High-Frequency Multirate Switched-Capacitor Circuits – Extending the Boundaries Of CMOS Analog Front-End Filtering[M]. US:Springer US, 2006, 250.
Authors:
U Seng Pan
;
Martins Rui Paulo
;
Epifanio da Franca Jose de Albuquerque
Favorite
|
TC[Scopus]:
0
|
Submit date:2019/02/26
Cmos
Cmos Analog Integrated Circuit
Filter
Front-end Filtering
Gain & Offset Compensation
High-frequency
Multirate Signal Processing
Secs
Switched-capacitor
The Kluwer International Series In engIneerIng And Computer
Timing-mismatch And Jitter
Calculus
Consumption
Integrated Circuit