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面向云服务的性能与隔离性定制化硬件资源抽象方法 Patent
专利类型: 发明专利Invention,
Authors:  YE KEJIANG;  SU LINYU;  LIN YANYING;  XU CHENGZHONG
Favorite |  | Submit date：2022/08/29
Cloud Services  Hardware Resource Abstraction  Fpga  
An FPGA-Based Transformer Accelerator With Parallel Unstructured Sparsity Handling for Question-Answering Applications Journal article
Cao, Rujian, Zhao, Zhongyu, Un, Ka Fai, Yu, Wei Han, Martins, Rui P., Mak, Pui In. An FPGA-Based Transformer Accelerator With Parallel Unstructured Sparsity Handling for Question-Answering Applications[J]. IEEE Transactions on Circuits and Systems II-Express Briefs, 2024, 71(11), 4688-4692.
Authors:  Cao, Rujian;  Zhao, Zhongyu;  Un, Ka Fai;  Yu, Wei Han;  Martins, Rui P.; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.0/3.7 | Submit date：2024/10/10
Sparse Matrices  Computational Modeling  Transformers  Hardware  Energy Efficiency  Circuits  Throughput  Dataflow  Digital Accelerator  Energy-efficient  Field-programmable Gate Array (Fpga)  Sparsity  Transformer  
Model Predictive Control-Based Active/Reactive Power Regulation of Inverter Air Conditioners for Improving Voltage Quality of Distribution Systems Journal article
Chen, Lunshu, Hui, Hongxun. Model Predictive Control-Based Active/Reactive Power Regulation of Inverter Air Conditioners for Improving Voltage Quality of Distribution Systems[J]. IEEE Transactions on Industrial Informatics, 2024.
Authors:  Chen, Lunshu;  Hui, Hongxun
Favorite | TC[WOS]:1 TC[Scopus]:1  IF:11.7/11.4 | Submit date：2024/11/05
Demand Response  Hardware-in-the-loop (Hil)  Inverter Air Conditioners (Iacs)  Model Predictive Control (Mpc)  Voltage Regulation  
Optimal Design of RDARS-aided Multi-user Systems with Low-resolution DACs Conference paper
Wang, Jintao, Ma, Chengzhi, Ma, Shaodan. Optimal Design of RDARS-aided Multi-user Systems with Low-resolution DACs[C]:Institute of Electrical and Electronics Engineers Inc., 2024, 536-540.
Authors:  Wang, Jintao;  Ma, Chengzhi;  Ma, Shaodan
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2024/11/05
Wireless Communication  Heuristic Algorithms  Transmitting Antennas  Signal Processing Algorithms  Benchmark Testing  Reflector Antennas  Downlink  Hardware  Surface Treatment  Antenna Arrays  Distributed Antenna System  Low-resolution Dac  Reconfigurable Intelligent Surface  Block Coordinate Descent  
A 28nm 314.6TLFOPS/W Reconfigurable Floating-Point Analog Compute-In-Memory Macro with Exponent Approximation and Two-Stage Sharing TD-ADC Conference paper
He, Pengyu, Zhao, Yuanzhe, Xie, Heng, Wang, Yang, Yin, Shouyi, Li, Li, Zhu, Yan, Martins, R. P., Chan, Chi Hang, Zhang, Minglei. A 28nm 314.6TLFOPS/W Reconfigurable Floating-Point Analog Compute-In-Memory Macro with Exponent Approximation and Two-Stage Sharing TD-ADC[C]:Institute of Electrical and Electronics Engineers Inc., 2024.
Authors:  He, Pengyu;  Zhao, Yuanzhe;  Xie, Heng;  Wang, Yang;  Yin, Shouyi; et al.
Favorite | TC[WOS]:0 TC[Scopus]:2 | Submit date：2024/06/05
Power Demand  In-memory Computing  Throughput  Energy Efficiency  Hardware  Common Information Model (Computing)  Artificial Intelligence  
Validating the reproducibility of a low-cost single-channel fNIRS device across hierarchical cognitive tasks Journal article
Xu, Shiyang, Zeng, Xing Ling, Yin, Fuxian, Zhang, Chao. Validating the reproducibility of a low-cost single-channel fNIRS device across hierarchical cognitive tasks[J]. Frontiers in Neuroscience, 2024, 18, 1351341.
Authors:  Xu, Shiyang;  Zeng, Xing Ling;  Yin, Fuxian;  Zhang, Chao
Favorite | TC[WOS]:1 TC[Scopus]:2 | Submit date：2024/05/16
Cognitive Tasks  Fnirs  Low-cost Fnirs Device  Open-source Hardware  Prefrontal Cortex Activation  
17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM Conference paper
Tan, Fei, Yu, Wei Han, Lin, Jinhai, Un, Ka Fai, Martins, Rui P., Mak, Pui In. 17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM[C]:Institute of Electrical and Electronics Engineers Inc., 2024, 330-332.
Authors:  Tan, Fei;  Yu, Wei Han;  Lin, Jinhai;  Un, Ka Fai;  Martins, Rui P.; et al.
Favorite | TC[Scopus]:2 | Submit date：2024/05/16
Computational Modeling  User Experience  Hardware  Computational Efficiency  Solid State Circuits  
22.1 A 12GS/s 12b 4× Time-Interleaved Pipelined ADC with Comprehensive Calibration of TI Errors and Linearized Input Buffer Conference paper
Cao, Yuefeng, Zhang, Minglei, Zhu, Yan, Martins, R. P., Chan, Chi Hang. 22.1 A 12GS/s 12b 4× Time-Interleaved Pipelined ADC with Comprehensive Calibration of TI Errors and Linearized Input Buffer[C]:Institute of Electrical and Electronics Engineers Inc., 2024, 388-390.
Authors:  Cao, Yuefeng;  Zhang, Minglei;  Zhu, Yan;  Martins, R. P.;  Chan, Chi Hang
Favorite | TC[Scopus]:7 | Submit date：2024/05/16
Radio Frequency  Power Measurement  Measurement Uncertainty  Linearity  Hardware  Energy Efficiency  Calibration  
An unsupervised real-time spike sorting system based on optimized OSort Journal article
Wu, Yingjiang, Li, Ben Zheng, Wang, Liyang, Fan, Shaocan, Chen, Changhao, Li, Anan, Lin, Qin, Wang, Panke. An unsupervised real-time spike sorting system based on optimized OSort[J]. Journal of Neural Engineering, 2023, 20(6), 066015.
Authors:  Wu, Yingjiang;  Li, Ben Zheng;  Wang, Liyang;  Fan, Shaocan;  Chen, Changhao; et al.
Favorite | TC[WOS]:2 TC[Scopus]:4  IF:3.7/5.0 | Submit date：2024/01/02
Electrode Drifting  Hardware Implementation  Low-power Electronics  Osort  Spike Sorting  
HCPerf: Driving Performance-Directed Hierarchical Coordination for Autonomous Vehicles Conference paper
Jialiang Ma, Li Li, Zejiang Wang, Jun Wang, ChengZhong Xu. HCPerf: Driving Performance-Directed Hierarchical Coordination for Autonomous Vehicles[C], USA:Institute of Electrical and Electronics Engineers Inc., 2023, 487-498.
Authors:  Jialiang Ma;  Li Li;  Zejiang Wang;  Jun Wang;  ChengZhong Xu
Favorite | TC[WOS]:2 TC[Scopus]:2 | Submit date：2023/08/28
Autonomous Driving  Real-time Scheduling  Schedules  Processor Scheduling  Sensor Fusion  Throughput  Real-time Systems  Hardware  Sensors