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A 2.56mW 40MHz-Bandwidth 75dB-SNDR Partial- Interleaving SAR-Assisted NS Pipeline ADC With Background Inter-Stage Offset Calibration Conference paper
Song, Y., Zhu, Y., Chan, C. H., Martins, R. P.. A 2.56mW 40MHz-Bandwidth 75dB-SNDR Partial- Interleaving SAR-Assisted NS Pipeline ADC With Background Inter-Stage Offset Calibration[C], 2020.
Authors:  Song, Y.;  Zhu, Y.;  Chan, C. H.;  Martins, R. P.
Favorite |  | Submit date：2022/01/25
analogue-digital conversion  calibration  CMOS digital integrated circuits  digital-analogue conversion  low-power electronics  preamplifiers  background inter-stage offset calibration  noise-shaping SAR hybrid architecture  NS-SAR  SNDR  power-hungry preamplifiers  low-noise targets  Schreier FoM  0-1 MASH SDM  pipeline-SAR structure  single-channel ADC  power-hungry residue amplifier  ADC power  area-hungry bit weight calibration  dynamic amplifier  pipeline operation  power efficiency  partial interleaving structu  
Tutorials in Circuits and Systems: Selected Topics in Power, RF, and Mixed-Signal ICs Book
Yan Lu, Chi-Seng Lam. Tutorials in Circuits and Systems: Selected Topics in Power, RF, and Mixed-Signal ICs[M]. River Publishers:River Publishers, 2017.
Authors:  Yan Lu;  Chi-Seng Lam
Favorite |  | Submit date：2022/08/12
Dc-dc Switching Converters  Analog And Digital Regulators  Analog And Digital Frequency Synthesizers  Hybrid Adc Architecture  Cmos Image Sensors  Cmos Temperature Sensors  Cmos Millimeter-wave Power Amplifiers  Zigbee  Ble Transmitter  Iot Applications  
Selected Topics in Power, RF, and Mixed-Signal ICs Book
Yan Lu, Chi-Seng Lam. Selected Topics in Power, RF, and Mixed-Signal ICs[M]. Gistrup, Denmark:River Publishers, 2017.
Authors:  Yan Lu;  Chi-Seng Lam
Favorite |  | Submit date：2019/04/03
Dc-dc Switching Converters  Iot Applications  Analog And Digital Regulators  Analog And Digital Frequency Synthesizers  Hybrid Adc Architecture  Cmos Image Sensors  Cmos Temperature Sensors  Cmos Millimeter-wave Power Amplifiers  Zigbee  Ble Transmitter  
A hybrid implementation of two-level domain decomposition algorithm for solving elliptic equation on CPU/GPUs Conference paper
Li Luo, Yubo Zhao, Xiao-Chuan Cai. A hybrid implementation of two-level domain decomposition algorithm for solving elliptic equation on CPU/GPUs[C], 2012, 474-477.
Authors:  Li Luo;  Yubo Zhao;  Xiao-Chuan Cai
Favorite | TC[WOS]:2 TC[Scopus]:2 | Submit date：2021/03/09
Domain Decomposition  Hybrid Architecture  Pdes  Scalable Algorithm  
DHMT: A scalable and efficient hybrid application-layer multicast protocol Conference paper
Li J., Gu N., Jia W.. DHMT: A scalable and efficient hybrid application-layer multicast protocol[C], 2007.
Authors:  Li J.;  Gu N.;  Jia W.
Favorite |  | Submit date：2019/02/11
Application-layer multicast  Fibonacci tree  Hybrid architecture