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A 54.6-65.1 GHz Multi-Path-Synchronized 16-Core Oscillator Achieving -131.4 dBc/Hz PN and 195.8 dBc/Hz FoMT at 10 MHz Offset in 65nm CMOS Conference paper
Zhan, Xiangxun, Yin, Jun, Martins, Rui P., Mak, Pui In. A 54.6-65.1 GHz Multi-Path-Synchronized 16-Core Oscillator Achieving -131.4 dBc/Hz PN and 195.8 dBc/Hz FoMT at 10 MHz Offset in 65nm CMOS[C]:IEEE Computer Society, 2024, 321-324.
Authors:  Zhan, Xiangxun;  Yin, Jun;  Martins, Rui P.;  Mak, Pui In
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2024/12/05
Figure Of Merit (Fom)  Millimeter Wave  Multiple Cores  Oscillator  Phase Noise (Pn)  Pn Penalty  
A Two-phase Multi-bit Incremental ADC with Variable Loop Order Journal article
Chen,Kaiquan, Wang,Biao, Liu,Yan, Ye,Fan, Sin,Sai Weng, Wang,Guoxing, Lian,Yong, Qi,Liang. A Two-phase Multi-bit Incremental ADC with Variable Loop Order[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2023, 70(8), 2724-2728.
Authors:  Chen,Kaiquan;  Wang,Biao;  Liu,Yan;  Ye,Fan;  Sin,Sai Weng; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.0/3.7 | Submit date：2023/08/03
Circuits And Systems  Variable Loop Order  Multi-bit Quantizer  Dwa Effectiveness  Noise Penalty  
L: Efficient Linear Reconstruction Filter for Incremental Delta-Sigma ADCs Journal article
Wang, Bo, Law, Man Kay, Schneider, Jens. L: Efficient Linear Reconstruction Filter for Incremental Delta-Sigma ADCs[J]. IEEE Transactions on Signal Processing, 2023, 71, 3229-3241.
Authors:  Wang, Bo;  Law, Man Kay;  Schneider, Jens
Favorite | TC[WOS]:2 TC[Scopus]:1  IF:4.6/5.2 | Submit date：2024/02/22
Analog-to-digital Data Converter  Digital Linear Filter  Frequency Notch  Incremental Delta-sigma Adc  l  Reconstruction Filter  Thermal Noise Penalty  
Noise Robust Face Hallucination Based on Smooth Correntropy Representation Journal article
Licheng Liu, Qiying Feng, C. L. Philip Chen, Yaonan Wang. Noise Robust Face Hallucination Based on Smooth Correntropy Representation[J]. IEEE Transactions on Neural Networks and Learning Systems, 2022, 33(10), 5953-5965.
Authors:  Licheng Liu;  Qiying Feng;  C. L. Philip Chen;  Yaonan Wang
Favorite | TC[WOS]:12 TC[Scopus]:17  IF:10.2/10.4 | Submit date：2022/05/13
Correntropy-induced Metric (Cim)  Faces  Fused Lasso Penalty  Image Reconstruction  Manifolds  Noise Measurement  Noise Robustness  Smooth Representation  Sparse Regression.  Superresolution  Training  
Near-Optimal Decoding of Incremental Delta-Sigma ADC Output Journal article
Wang,Bo, Law,Man Kay, Belhaouari,Samir Brahim, Bermak,Amine. Near-Optimal Decoding of Incremental Delta-Sigma ADC Output[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2020, 67(11), 3670-3680.
Authors:  Wang,Bo;  Law,Man Kay;  Belhaouari,Samir Brahim;  Bermak,Amine
Favorite | TC[WOS]:8 TC[Scopus]:8  IF:5.2/4.5 | Submit date：2021/03/11
Decimation Filter  Delta-sigma Modulator  Idc  Incremental Adc  Noise Penalty Factor  Optimal Filter  Reconstruction Filter  Thermal Noise Averaging  
Weighted broad learning system and its application in nonlinear industrial process modeling Journal article
Chu, Fei, Liang, Tao, Chen, C. L.Philip, Wang, Xuesong, Ma, Xiaoping. Weighted broad learning system and its application in nonlinear industrial process modeling[J]. IEEE Transactions on Neural Networks and Learning Systems, 2019, 31(8), 3017-3031.
Authors:  Chu, Fei;  Liang, Tao;  Chen, C. L.Philip;  Wang, Xuesong;  Ma, Xiaoping
Favorite | TC[WOS]:94 TC[Scopus]:110  IF:10.2/10.4 | Submit date：2021/12/06
Broad Learning System (Bls)  Incremental Learning Algorithm  Noise And Outliers  Weighted Penalty Factor