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An Intrinsically PVT Robust 10-bit 2.6-GS/s Dynamic Pipelined ADC with Dual-Path Time-Assisted Residue Generation Scheme
Journal article
Hao, Junyan, Zhang, Minglei, Liu, Zijian, Zhang, Yanbo, Liu, Shubin, Zhu, Zhangming, Zhu, Yan, Martins, Rui P., Chan, Chi Hang. An Intrinsically PVT Robust 10-bit 2.6-GS/s Dynamic Pipelined ADC with Dual-Path Time-Assisted Residue Generation Scheme[J]. IEEE Journal of Solid-State Circuits, 2024.
Authors:
Hao, Junyan
;
Zhang, Minglei
;
Liu, Zijian
;
Zhang, Yanbo
;
Liu, Shubin
; et al.
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Submit date：2024/12/26
Analog-to-digital Converter (Adc)
Parallel Quantization And Amplification
Pipelined Adc
Time-domain (Td) Adc
Voltage-to-time Converter (Vtc)
