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An FPGA-Based Energy-Efficient Reconfigurable Convolutional Neural Network Accelerator for Object Recognition Applications Journal article
Li, Jixuan, Un, Ka Fai, Yu, Wei Han, Mak, Pui In, Martins, Rui P.. An FPGA-Based Energy-Efficient Reconfigurable Convolutional Neural Network Accelerator for Object Recognition Applications[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2021, 68(9), 3143-3147.
Authors:  Li, Jixuan;  Un, Ka Fai;  Yu, Wei Han;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:40 TC[Scopus]:51  IF:4.0/3.7 | Submit date：2021/09/20
Computation Efficiency  Convolutional Neural Network (Cnn)  Fpga  Object Recognition  Reconfigurability  
A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancemen Conference paper
Li, J., Chen, J., Un, K. F., Yu, W. H., Mak, P. I., Martins, R. P.. A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancemen[C], IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE, 2021.
Authors:  Li, J.;  Chen, J.;  Un, K. F.;  Yu, W. H.;  Mak, P. I.; et al.
Favorite | TC[WOS]:2  | Submit date：2022/01/25
Computation Efficiency  Convolutional Neural Network (Cnn)  Fpga  Object Recognition  Reconfigurability  
A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancement Conference paper
Li, Jixuan, Chen, Jiabao, Un, Ka Fai, Yu, Wei Han, Mak, Pui In, Martins, Rui P.. A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancement[C], IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE, 2021.
Authors:  Li, Jixuan;  Chen, Jiabao;  Un, Ka Fai;  Yu, Wei Han;  Mak, Pui In; et al.
Favorite | TC[WOS]:2 TC[Scopus]:5 | Submit date：2023/03/30
Computation Efficiency  Convolutional Neural Network (Cnn)  Fpga  Object Recognition  Reconfigurability  
A High-Gain and Pattern-Reconfigurable Patch Antenna under Operation of TM and TM Modes Journal article
Hong, Kai Dong, Zhang, Xiao, Zhu, Lei, Yuan, Tao. A High-Gain and Pattern-Reconfigurable Patch Antenna under Operation of TM and TM Modes[J]. IEEE OPEN JOURNAL OF ANTENNAS AND PROPAGATION, 2021, 2, 646-653.
Authors:  Hong, Kai Dong;  Zhang, Xiao;  Zhu, Lei;  Yuan, Tao
Favorite | TC[WOS]:10 TC[Scopus]:12 | Submit date：2022/05/13
High Gain  High-order Modes  Patch Antenna  Pattern-reconfigurability  Slot Loading  
A 108 F2/Bit Fully Reconfigurable RRAM PUF Based on Truly Random Dynamic Entropy of Jitter Noise Journal article
Zhao,Qiang, Zheng,Wenhan, Zhao,Xiaojin, Cao,Yuan, Zhang,Feng, Law,Man Kay. A 108 F2/Bit Fully Reconfigurable RRAM PUF Based on Truly Random Dynamic Entropy of Jitter Noise[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2020, 67(11), 3866-3879.
Authors:  Zhao,Qiang;  Zheng,Wenhan;  Zhao,Xiaojin;  Cao,Yuan;  Zhang,Feng; et al.
Favorite | TC[WOS]:25 TC[Scopus]:26  IF:5.2/4.5 | Submit date：2021/03/11
Dynamic Entropy Source  Full Reconfigurability  High Reliability  Physical Unclonable Function  Resistive Random Access Memory  True Random Number Generator  
Reconfigurable mismatch-free time-interleaved bandpass sigma-delta modulator for wireless communications Journal article
Dongyang Jiang, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins, Franco Maloberti. Reconfigurable mismatch-free time-interleaved bandpass sigma-delta modulator for wireless communications[J]. ELECTRONICS LETTERS, 2017, 53(7), 506–508.
Authors:  Dongyang Jiang;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins;  Franco Maloberti
Favorite | TC[WOS]:2 TC[Scopus]:3  IF:0.7/0.9 | Submit date：2018/10/30
Sigma-delta Modulation  Modulators  Software Radio  Radio Receivers  Circuit Simulation  Band-pass Filters  Table Lookup  Reconfigurable Mismatch-free Time-interleaved Bandpass Sigma-delta Modulator  Wireless Communications  Control Parameters  Look-up Table  Path Numbers  Path Sampling Frequencies  Tuning Coefficients  Design Reconfigurability  Multiband Receiver  Software Defined Radio Systems  Behavioural Simulations