UM

Browse/Search Results:  1-10 of 12 Help

Selected(0)Clear Items/Page:    Sort:
A 0.016mm2 Active Area 4GHz Fully Ring-Oscillator-Based Cascaded Fractional-N PLL With Burst-Mode Sampling Journal article
Junlin Zhong, Xiaofeng Yang, Rui P. Martins, Yan Zhu, Chi-Hang Chan. A 0.016mm2 Active Area 4GHz Fully Ring-Oscillator-Based Cascaded Fractional-N PLL With Burst-Mode Sampling[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2023, 70(10), 3792 - 3796.
Authors:  Junlin Zhong;  Xiaofeng Yang;  Rui P. Martins;  Yan Zhu;  Chi-Hang Chan
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.0/3.7 | Submit date:2023/11/01
Fractional-n Pll  Ring Vco  Cascaded Pll  Burst-mode Sampling (Bms) Scheme  
A Fully-Integrated Ambient RF Energy Harvesting System with 423-µW Output Power Journal article
Pakkirisami Churchill, Kishore Kumar, Ramiah, Harikrishnan, Chong, Gabriel, Chen, Yong, Mak, Pui In, Martins, Rui P.. A Fully-Integrated Ambient RF Energy Harvesting System with 423-µW Output Power[J]. SENSORS, 2022, 22(12), 4415.
Authors:  Pakkirisami Churchill, Kishore Kumar;  Ramiah, Harikrishnan;  Chong, Gabriel;  Chen, Yong;  Mak, Pui In; et al.
Favorite | TC[WOS]:16 TC[Scopus]:17  IF:3.4/3.7 | Submit date:2022/08/02
Charge Pump  Clock Generator  Cmos  Dc-dc  Rf Energy Harvesting (Rfeh)  Rf-dc  Ring-vco  Shared-dynamic-biasing  
A 0.003-mm2440fsRMS-Jitter and -64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS Journal article
Zunsong Yang, Yong Chen, Pui In Mak, Rui P. Martins. A 0.003-mm2440fsRMS-Jitter and -64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2021, 68(6), 2307-2316.
Authors:  Zunsong Yang;  Yong Chen;  Pui In Mak;  Rui P. Martins
Favorite | TC[WOS]:13 TC[Scopus]:15  IF:5.2/4.5 | Submit date:2021/09/20
Cmos  Current-reuse Sampling Phase Detector (Crs-pd)  Integrated Jitter  Loop Filter (Lf)  Master-slave Sampling Filter (Mssf)  Master-slave Sampling Phase Detector (Mss-pd)  Phase Noise (Pn)  Phase-locked Loop (Pll)  Reference Spur  Ring Voltage-controlled Oscillator (Vco)  Type-i  Type-ii  
A 0.003-mm2 440fsRMS-Jitter and-64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS Conference paper
Yang,Zunsong, Chen,Yong, Mak,Pui In, Martins,Rui P.. A 0.003-mm2 440fsRMS-Jitter and-64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS[C], 2020, 283-284.
Authors:  Yang,Zunsong;  Chen,Yong;  Mak,Pui In;  Martins,Rui P.
Favorite | TC[WOS]:13 TC[Scopus]:7 | Submit date:2021/03/09
Phase Detector  Phase Locked Loop (Pll)  Reference Spur  Ring Voltage-controlled Oscillator (Vco)  Rms Jitter  
“A 0.003-mm2 440fsRMS-Jitter and -64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS Conference paper
Yang, Z., Chen, Y., Mak, P. I., Martins, R. P.. “A 0.003-mm2 440fsRMS-Jitter and -64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS[C], 2019.
Authors:  Yang, Z.;  Chen, Y.;  Mak, P. I.;  Martins, R. P.
Favorite |  | Submit date:2022/01/25
Ring voltage-controlled oscillator (VCO)  phase locked loop (PLL)  reference spur  RMS jitter  phase detector.  
A 0.12-mm2 1.2-to-2.4 mW 1.3-to-2.65 GHz Fractional-N Bang-Bang Digital PLL with 8-μs Settling Time for Multi-ISM-Band ULP Radios Journal article
Un, K. F., Qi, G., Yin, J., Yang, S., Yu, S., Ieong, C. -I., Mak, P. I., Martins, R. P.. A 0.12-mm2 1.2-to-2.4 mW 1.3-to-2.65 GHz Fractional-N Bang-Bang Digital PLL with 8-μs Settling Time for Multi-ISM-Band ULP Radios[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2019, 3307-3316.
Authors:  Un, K. F.;  Qi, G.;  Yin, J.;  Yang, S.;  Yu, S.; et al.
Favorite |   IF:5.2/4.5 | Submit date:2022/01/25
digital phase-locked loop (DPLL)  bang-bang  digital-to-time converter (DTC)  gain calibration  voltage-controlled oscillator (VCO)  ring VCO  ultra-low-power (ULP)  ultra-fast settling  
A 0.12-mm2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N bang-bang digital PLL with 8-μs settling time for multi-ISM-Band ULP radios Journal article
Un,Ka Fai, Qi,Gengzhen, Yin,Jun, Yang,Shiheng, Yu,Shupeng, Ieong,Chio In, Mak,Pui In, Martins,Rui P.. A 0.12-mm2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N bang-bang digital PLL with 8-μs settling time for multi-ISM-Band ULP radios[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2019, 66(9), 3307-3316.
Authors:  Un,Ka Fai;  Qi,Gengzhen;  Yin,Jun;  Yang,Shiheng;  Yu,Shupeng; et al.
Favorite | TC[WOS]:11 TC[Scopus]:12  IF:5.2/4.5 | Submit date:2021/03/09
Bang-bang  Digital Phase-locked Loop (Dpll)  Digital-to-time Converter (Dtc)  Gain Calibration  Ring Vco  Ultra-fast Settling  Ultra-low-power (Ulp)  Voltage-controlled Oscillator (Vco)  
Design Considerations of Distributed and Centralized Switched-Capacitor Converters for Power Supply On-Chip Journal article
Lu, Yan, Jiang, Junmin, Ki, Wing-Hung. Design Considerations of Distributed and Centralized Switched-Capacitor Converters for Power Supply On-Chip[J]. IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2018, 6(2), 515-525.
Authors:  Lu, Yan;  Jiang, Junmin;  Ki, Wing-Hung
Favorite | TC[WOS]:17 TC[Scopus]:19  IF:4.6/5.3 | Submit date:2018/10/30
Active-matrix Light-emitting Diode (Amled)  Amplifier  Charge Pump  Converter Ring  Dc-dc Converter  Digital Control  Dynamic Voltage Scaling (Dvs)  Fully Integrated Voltage Regulator (Fivr)  Hybrid Converter  Low-dropout Regulator (Ldo)  Multilevel  Multiphase  Resonant Converter  Switched-capacitor (Sc) Power Converter  Voltage-controlled Oscillator (Vco)  
A 0.032-mm^2 0.15-V 3-Stage Charge-Pump Scheme Using a Differential Bootstrapped Ring-VCO for Energy-Harvesting Applications Journal article
Yi, H., Yin, J., Mak, P. I., Martins, R. P.. A 0.032-mm^2 0.15-V 3-Stage Charge-Pump Scheme Using a Differential Bootstrapped Ring-VCO for Energy-Harvesting Applications[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2018, 146-150.
Authors:  Yi, H.;  Yin, J.;  Mak, P. I.;  Martins, R. P.
Favorite |   IF:4.0/3.7 | Submit date:2022/01/24
Bootstrapped  CMOS  energy harvesting  charge pump (CP)  ring-VCO  reverse current  ultra-low voltage  
A 0.032-mm2 0.15-V Three-Stage Charge-Pump Scheme Using a Differential Bootstrapped Ring-VCO for Energy-Harvesting Applications Journal article
Haidong Yi, Jun Yin, Pui-In Mak, Rui P. Martins. A 0.032-mm2 0.15-V Three-Stage Charge-Pump Scheme Using a Differential Bootstrapped Ring-VCO for Energy-Harvesting Applications[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2018, 65(2), 146-150.
Authors:  Haidong Yi;  Jun Yin;  Pui-In Mak;  Rui P. Martins
Favorite | TC[WOS]:54 TC[Scopus]:63 | Submit date:2019/02/11
Bootstrapped  Charge Pump (Cp)  Cmos  Energy Harvesting  Reverse Current  Ring-vco  Ultra-low Voltage