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Analysis and verification of jitter in bang-bang clock and data recovery circuit with a second-order loop filter
Journal article
Ge,Xinyi, Chen,Yong, Zhao,Xiaoteng, Mak,Pui In, Martins,Rui P.. Analysis and verification of jitter in bang-bang clock and data recovery circuit with a second-order loop filter[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019, 27(10), 2223-2236.
Authors:
Ge,Xinyi
;
Chen,Yong
;
Zhao,Xiaoteng
;
Mak,Pui In
;
Martins,Rui P.
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TC[WOS]:
19
TC[Scopus]:
19
IF:
2.8
/
2.8
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Submit date：2021/03/09
Bang-bang Clock And Data Recovery (Bbcdr)
Bang-bang Phase Detector (Bbpd)
Binary
Fourier Series
Jitter Generation (Jgen)
Jitter Tolerance (Jtol)
Jitter Transfer Function (Jtf)
Linear Phase Detector
Loop Filter (Lf)
Sinking Area
