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Design Challenges and Considerations of Non-isolated Gate Driver for GaN-based Converters Conference paper
Xuchu Mu, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui P. Martins. Design Challenges and Considerations of Non-isolated Gate Driver for GaN-based Converters[C], 2022.
Authors:  Xuchu Mu;  Yang Jiang;  Man-Kay Law;  Pui-In Mak;  Rui P. Martins
Favorite | TC[WOS]:1 TC[Scopus]:3 | Submit date：2022/09/30
Adaptive Control  Dc-dc Converter  Gan  Gate Driver  Slew Rate  
A Fully Integrated FVF-Based Low-Dropout Regulator with Wide Load Capacitance and Current Ranges Journal article
Huang,Mo, Feng,Haigang, Lu,Yan. A Fully Integrated FVF-Based Low-Dropout Regulator with Wide Load Capacitance and Current Ranges[J]. IEEE Transactions on Power Electronics, 2019, 34(12), 11880-11888.
Authors:  Huang,Mo;  Feng,Haigang;  Lu,Yan
Favorite | TC[WOS]:45 TC[Scopus]:55  IF:6.6/6.9 | Submit date：2021/03/11
Amplifier  Damping Factor Control (Dfc)  Feed-forward  Flipped Voltage Follower (Fvf)  Low-dropout Regulator (Ldo)  Output Capacitorless (Ocl)  Slew Rate Enhancement (Sre)  Super Source Follower (Ssf)  
A Slew Rate Variation Compensated 2 x VDD I/O Buffer Using Deterministic P/N-PVT Variation Detection Method Journal article
Lee, Tzung-Je, Tsai, Tsung-Yi, Lin, Wei, Chio, U-Fat, Wang, Chua-Chin. A Slew Rate Variation Compensated 2 x VDD I/O Buffer Using Deterministic P/N-PVT Variation Detection Method[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2019, 66(1), 116-120.
Authors:  Lee, Tzung-Je;  Tsai, Tsung-Yi;  Lin, Wei;  Chio, U-Fat;  Wang, Chua-Chin
Favorite | TC[WOS]:13 TC[Scopus]:14  IF:4.0/3.7 | Submit date：2019/01/17
I/o Buffer  Mixed-voltage Tolerant  Pvt Variation  Leakage  Slew Rate Compensation  
A Dynamic Leakage and Slew Rate Compensation Circuit for 40-nm CMOS Mixed-Voltage Output Buffer Journal article
Lee, Tzung-Je, Tsai, Tsung-Yi, Lin, Wei, Chio, U-Fat, Wang, Chua-Chin. A Dynamic Leakage and Slew Rate Compensation Circuit for 40-nm CMOS Mixed-Voltage Output Buffer[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 25(11), 3166-3174.
Authors:  Lee, Tzung-Je;  Tsai, Tsung-Yi;  Lin, Wei;  Chio, U-Fat;  Wang, Chua-Chin
Favorite | TC[WOS]:7 TC[Scopus]:8  IF:2.8/2.8 | Submit date：2018/10/30
Dynamic Leakage Reduction  I/o Buffer  Mixed-voltage Tolerant  Process-voltage-temperature (Pvt) Variation  Slew Rate Compensation  
Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier with Enhancements of DC Gain, GBW and Slew Rate Journal article
Zushu Yan, Pui-In Mak, Man-Kay Law, Rui P. Martins, Franco Maloberti. Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier with Enhancements of DC Gain, GBW and Slew Rate[J]. IEEE Journal of Solid-State Circuits, 2015, 50(10), 2353-2366.
Authors:  Zushu Yan;  Pui-In Mak;  Man-Kay Law;  Rui P. Martins;  Franco Maloberti
Favorite | TC[WOS]:61 TC[Scopus]:67 | Submit date：2019/02/11
Area Efficiency  Cmos  Current Mirror  Dc Gain  Differential-pair (Dp) Amplifier  Frequency Compensation  Gain-bandwidth Product (Gbw)  Low Temperature Polysilicon Lcd  Multi-stage Amplifier  Nested Current Mirror  Rail-to-rail Output Swing  Single-stage Amplifier  Slew Rate (Sr)  Stability