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Universal Stability Criterion for Type-I Sampling Phase-Locked Loops
Journal article
Huang, Yunbo, Chen, Yong, Mak, Pui In, Martins, Rui P.. Universal Stability Criterion for Type-I Sampling Phase-Locked Loops[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2023, 70(4), 1351-1355.
Authors:
Huang, Yunbo
;
Chen, Yong
;
Mak, Pui In
;
Martins, Rui P.
Favorite
|
TC[WOS]:
3
TC[Scopus]:
3
IF:
4.0
/
3.7
|
Submit date:2023/05/02
Given Phase Margin (Pm)
Linear Time-variant (Ltv) Mode
Sampling Phase-locked Loop (S-pll)
Sub-sampling Pll (ss-Pll)
Type-i
Voltage-controlled Oscillator (Vco)
A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push-Pull SS-PD and a Fast-Locking FLL Achieving -82.2-dBc REF Spur and -255-dB FOM
Journal article
Yang, Zunsong, Chen, Yong, Yuan, Jia, Mak, Pui In, Martins, Rui P.. A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push-Pull SS-PD and a Fast-Locking FLL Achieving -82.2-dBc REF Spur and -255-dB FOM[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021, 30(2), 238-242.
Authors:
Yang, Zunsong
;
Chen, Yong
;
Yuan, Jia
;
Mak, Pui In
;
Martins, Rui P.
Favorite
|
TC[WOS]:
20
TC[Scopus]:
21
IF:
2.8
/
2.8
|
Submit date:2022/03/04
Binary Frequency Shift Keying (Bfsk)
Frequency-locked Loop (Fll)
Integer-n
Phase Detector (Pd)
Phase Noise (Pn)
Phase-locked Loop (Pll)
Push-pull
Reference (Ref) Spur
Sub-sampling (Ss)
Voltage-controlled Oscillator (Vco)