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A Compact Sub-nW/kHz Relaxation Oscillator Using a Negative-Offset Comparator With Chopping and Piecewise Charge-Acceleration in 28-nm CMOS Journal article
Liu, Yueduo, Zhu, Zihao, Bao, Rongxin, Lin, Jiahui, Yin, Jun, Li, Qiang, Mak, Pui-In, Yang, Shiheng. A Compact Sub-nW/kHz Relaxation Oscillator Using a Negative-Offset Comparator With Chopping and Piecewise Charge-Acceleration in 28-nm CMOS[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2023, 71(2), 515-525.
Authors:  Liu, Yueduo;  Zhu, Zihao;  Bao, Rongxin;  Lin, Jiahui;  Yin, Jun; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:5.2/4.5 | Submit date：2024/03/13
Allan Deviation  Cmos  Energy Efficiency  Internet Of Things (Iot)  Rc Oscillator  Relaxation Oscillator  Small Area  Temperature Stability  Timing Accuracy  Ultra-low-power  
A 880 nW, 100 kS/s, 13 bit Differential Relaxation-DAC in 180 nm Conference paper
Rubino,Roberto, Musolino,Francesco, Chen,Yong, Richelli,Anna, Crovetti,Paolo. A 880 nW, 100 kS/s, 13 bit Differential Relaxation-DAC in 180 nm[C]. Bosch, et al., Huawei, Photeon Technologies, Synopsys:Institute of Electrical and Electronics Engineers Inc., 2023, 269-272.
Authors:  Rubino,Roberto;  Musolino,Francesco;  Chen,Yong;  Richelli,Anna;  Crovetti,Paolo
Favorite | TC[WOS]:3 TC[Scopus]:3 | Submit date：2023/08/03
Consumer Data Converter.  D/a Converter (Dac)  Digital Intensive  Relaxation D/a Converter (Redac)  Ultra-low Area  Ultra-low Power  
A 600-µm2 Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS Journal article
Yang, Shiheng, Yin, Jun, Xu, Tailong, Yi, Taimo, Mak, Pui-In, Li, Qiang, Martins, Rui P.. A 600-µm2 Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2021, 68(9), 3108 - 3112.
Authors:  Yang, Shiheng;  Yin, Jun;  Xu, Tailong;  Yi, Taimo;  Mak, Pui-In; et al.
Favorite | TC[WOS]:6 TC[Scopus]:7  IF:4.0/3.7 | Submit date：2022/01/25
Area  Analog Phase-locked Loop (Pll)  Cmos  Charge-sharing Integrator  Digital Pll  Hybrid Pll  Integrator  Integer-n  Jitter  Ring Oscillator  Ultra-low Power  
A 600-μm² Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS Journal article
Yang, Shiheng, Yin, Jun, Xu, Tailong, Yi, Taimo, Mak, Pui In, Li, Qiang, Martins, Rui P.. A 600-μm² Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2021, 68(9), 3108-3112.
Authors:  Yang, Shiheng;  Yin, Jun;  Xu, Tailong;  Yi, Taimo;  Mak, Pui In; et al.
Favorite | TC[WOS]:6 TC[Scopus]:7  IF:4.0/3.7 | Submit date：2021/09/20
Analog Phase-locked Loop (Pll)  Area  Charge-sharing Integrator  Cmos  Digital Pll  Hybrid Pll  Integer-n  Integrator  Jitter  Ring Oscillator  Ultra-low Power  
A 600-µm2 Ring-VCO-Based Type-II Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS Journal article
Yang, Shiheng, Yin, Jun, Xu, Tailong, Yi, Taimo, Mak, Pui-In, Li, Qiang, Martins, Rui P.. A 600-µm2 Ring-VCO-Based Type-II Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2021, 68(9), 3108-3112.
Authors:  Yang, Shiheng;  Yin, Jun;  Xu, Tailong;  Yi, Taimo;  Mak, Pui-In; et al.
Favorite | TC[WOS]:6 TC[Scopus]:7  IF:4.0/3.7 | Submit date：2022/08/19
Area  Analog Phase-locked Loop (Pll)  Cmos  Charge-sharing Integrator  Digital Pll  Hybrid Pll  Integrator  Integer-n  Jitter  Ring Oscillator  Ultra-low Power